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M36L0R7060T1 Datasheet, PDF (12/22 Pages) STMicroelectronics – 128 Mbit (Multiple Bank, Multilevel, Burst) Flash memory and 64 Mbit (Burst) PSRAM, 1.8 V supply, multichip package
Signal descriptions
M36L0R7060T1, M36L0R7060B1
2.19
VDDQF supply voltage
VDDQF provides the power supply for the Flash I/O pins. This allows all outputs to be
powered independently of the Flash core power supplies, VDDF and VCCP.
2.20
VPPF Program supply voltage
VPPF is both a Flash control input and a Flash power supply pin. The two functions are
selected by the voltage range applied to the pin.
If VPPF is kept in a low voltage range (0V to VDDQF) VPPF is seen as a control input. In this
case a voltage lower than VPPLK gives an absolute protection against Program or Erase,
while VPP in the VPP1 range enables these functions (see the M58LR128HTB datasheet for
the relevant values). VPPF is only sampled at the beginning of a Program or Erase; a change
in its value after the operation has started does not have any effect and Program or Erase
operations continue.
If VPPF is in the range of VPPH it acts as a power supply pin. In this condition VPPF must be
stable until the Program/Erase algorithm is completed.
2.21
Note:
VSS ground
VSS is the common ground reference for all voltage measurements in the Flash (core and
I/O buffers) and PSRAM chips. It must be connected to the system ground.
Each Flash memory device in a system should have their supply voltage (VDDF) and the
program supply voltage VPPF decoupled with a 0.1 µF ceramic capacitor close to the pin
(high frequency, inherently low inductance capacitors should be as close as possible to the
package). See Figure 5: AC measurement load circuit. The PCB track widths should be
sufficient to carry the required VPPF program and erase currents.
12/22