M36L0R7060T1 Datasheet, PDF (1/22 Pages) STMicroelectronics – 128 Mbit (Multiple Bank, Multilevel, Burst) Flash memory and 64 Mbit (Burst) PSRAM, 1.8 V supply, multichip package

M36L0R7060T1
M36L0R7060B1
128 Mbit (Multiple Bank, Multilevel, Burst) Flash memory
and 64 Mbit (Burst) PSRAM, 1.8 V supply, multichip package
Features
■ Multichip package
– 1 die of 128 Mbit (8 Mb x16, Multiple Bank,
Multilevel, Burst) Flash memory
– 1 die of 64 Mbit (4 Mb x16) Pseudo SRAM
■ Supply voltage
– V_DDF = V_CCP = V_DDQF = 1.7 to 1.95 V
– V_PPF = 9 V for fast program
■ Electronic signature
– Manufacturer Code: 20h
– Top Device Code
M36L0R7060T1: 88C4h
– Bottom Device Code
M36L0R7060B1: 88C5h
■ Package
– ECOPACK®
Flash memory
■ Synchronous / Asynchronous Read
– Synchronous Burst Read mode: 54 MHz,
66 MHz
– Random Access: 70 ns, 85 ns
■ Synchronous Burst Read Suspend
■ Programming time
– 2.5 µs typical word program time using
Buffer Enhanced Factory Program
command
■ Memory organization
– Multiple Bank memory array: 8 Mbit banks
– Parameter Blocks (top or bottom location)
■ Common Flash Interface (CFI)
■ 100 000 program/erase cycles per block
■ Dual operations
– program/erase in one Bank while read in
others
– No delay between read and write
operations
FBGA
TFBGA88 (ZAQ)
8 x 10 mm
■ Security
– 64 bit unique device number
– 2112 bit user programmable OTP Cells
■ Block locking
– All blocks locked at power-up
– Any combination of blocks can be locked
with zero latency
– WP_F for Block Lock-Down
– Absolute Write Protection with V_PPF = V_SS
PSRAM
■ Access time: 70 ns
■ Asynchronous Page Read
– Page Size: 4, 8 or 16 words
– Subsequent read within page: 20 ns
■ Low power features
– Automatic Temperature-compensated Self-
Refresh (TCR)
– Partial Array Self-Refresh (PASR)
– Deep Power-Down (DPD) mode
■ Synchronous Burst Read/Write
November 2007
Rev 2
1/22
www.numonyx.com
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