PC87364 Datasheet, PDF (94/180 Pages) National Semiconductor (TI) – 128-Pin LPC SuperI/O with Extended Wake-Up and Protection Support

3.0 System Wake-Up Control (SWC) (Continued)
3.4.12 Wake-Up Extension 1 Enable Register 1 (WK_X1EN1)
This register is set to FFh on power-up of V_PP or software reset. It controls the routing of raw wake-up events to event de-
tectors while V_DD is present. Wake-up events that are enabled are routed to their event detectors while V_DD is present.
Location: Bank 2, Offset 18h
Type:
R/W
Bit
Name
Reset
7
6
5
4
3
2
1
0
GPIE7
Event Ex. 1
Enable
GPIE6
Event Ex. 1
Enable
GPIE5
Event Ex. 1
Enable
GPIE4/
RING
Event Ex. 1
Enable
GPIE3
Event Ex. 1
Enable
GPIE2
Event Ex. 1
Enable
GPIE1
Event Ex. 1
Enable
GPIE0
Event Ex. 1
Enable
1
1
1
1
1
1
1
1
Bit
7 GPIE7 Event Extension 1 Enable
0: Disabled
1: Enabled (default)
6 GPIE6 Event Extension 1 Enable
0: Disabled
1: Enabled (default)
5 GPIE5 Event Extension 1 Enable
0: Disabled
1: Enabled (default)
4 GPIE4/RING Event Extension 1 Enable
0: Disabled
1: Enabled (default)
3 GPIE3 Event Extension 1 Enable
0: Disabled
1: Enabled (default)
2 GPIE2 Event Extension 1 Enable
0: Disabled
1: Enabled (default)
1 GPIE1 Event Extension 1 Enable
0: Disabled
1: Enabled (default)
0 GPIE0 Event Extension 1 Enable
0: Disabled
1: Enabled (default)
Description
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