NSAM265SR Datasheet, PDF (43/58 Pages) National Semiconductor (TI) – CompactSPEECH Digital Speech Processors

Appendix A Device Specifications (Continued)
TL EE 12378 – 28
Note This cycle may be either TI (Idle) or T1 of any non-DRAM bus cycle If the next bus cycle is a DRAM one T3RF is followed by three TI (Idle) cycles
FIGURE A-12 DRAM Refresh Cycle Timing (Normal Operation)
FIGURE A-13 DRAM Power-Down Refresh Cycle Timing
TL EE 12378 – 29
43