DS90C241_0608 Datasheet, PDF (4/21 Pages) National Semiconductor (TI) – 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

Serializer Timing Requirements for TCLK (Continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
t_JIT
TCLK Input Jitter
(Note 9)
Min Typ Max Units
ps
33 (RMS)
Serializer Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
t_LLHT
t_LHLT
LVDS Low-to-High Transition Time
LVDS High-to-Low Transition Time
R_L = 100Ω, (Figure 3)
C_L = 10 pF to GND
VODSEL = L
t_DIS
DIN (23:0) Setup to TCLK
R_L = 100Ω,
5
t_DIH
DIN (23:0) Hold from TCLK
C_L = 10 pF to GND
(Note 8)
5
t_HZD
DOUT ± HIGH to TRI-STATE Delay R_L = 100Ω,
t_LZD
DOUT ± LOW to TRI-STATE Delay ^CL ^{= 10 pF to GND}
t_ZHD
DOUT ± TRI-STATE to HIGH Delay ^{(Figure 7) (Note 4)}
t_ZLD
DOUT ± TRI-STATE to LOW Delay
t_PLD
Serializer PLL Lock Time
R_L = 100Ω, (Figure 8)
t_SD
Serializer Delay
R_L = 100Ω, (Figure 9)
VODSEL = L, TRFB = H
R_L = 100Ω, (Figure 9)
VODSEL = L, TRFB = L
TxOUT_E_O
TxOUT_Eye_Opening
(respect to ideal)
5–35 MHz
(Figure 14)
0.75
(Notes 8, 9, 13)
Typ
3.5T + 2.85
3.5T + 2.85
Max Units
0.6
ns
0.6
ns
ns
ns
15
ns
15
ns
200
ns
200
ns
10
ms
3.5T
ns
+ 10
3.5T
ns
+ 10
UI
(Note 10)
Deserializer Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Pin/Freq.
Min
Typ
t_RCP
Receiver out Clock Period
t_RCP = t_TCP
(Note 8)
RCLK
28.6
t_RDC
t_CLH
t_CHL
RCLK Duty Cycle
RCLK
45
50
LVCMOS Low-to-High
C_L = 8 pF
ROUT [23:0],
2.5
Transition Time
(lumped load)
LOCK, RCLK
LVCMOS High-to-Low
(Figure 4)
2.5
Transition Time
t_ROS
t_ROH
t_ROS
t_ROH
t_ROS
t_ROH
ROUT (7:0) Setup Data to
RCLK (Group 1)
ROUT (7:0) Hold Data to
RCLK (Group 1)
ROUT (15:8) Setup Data to
RCLK (Group 2)
ROUT (15:8) Hold Data to
RCLK (Group 2)
ROUT (23:16) Setup Data to
RCLK (Group 3)
ROUT (23:16) Hold Data to
RCLK (Group 3)
(Figure 11)
(Figure 11)
(Figure 11)
ROUT [7:0]
ROUT [15:8],
LOCK
ROUT [23:16]
(0.40)*
t_RCP
(0.40)*
t_RCP
(0.40)*
t_RCP
(0.40)*
t_RCP
(0.40)*
t_RCP
(0.40)*
t_RCP
(29/56)*t_RCP
(27/56)*t_RCP
0.5*t_RCP
0.5*t_RCP
(27/56)*t_RCP
(29/56)*t_RCP
Max Units
200
ns
55
%
3.5
ns
3.5
ns
ns
ns
ns
ns
ns
ns
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