DS90C241_0608 Datasheet, PDF (12/21 Pages) National Semiconductor (TI) – 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

AC Timing Diagrams and Test Circuits (Continued)
RxIN_TOL_L is the ideal noise margin on the left of the figure, with respect to ideal.
RxIN_TOL_R is the ideal noise margin on the right of the above figure, with respect to ideal.
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FIGURE 15. Receiver Input Tolerance (RxIN_TOL) and Sampling Window
VOD = (D_OUT+) – (D_{OUT -})
Differential output signal is shown as (D_OUT+) – (D_{OUT -}), device in Data Transfer mode.
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FIGURE 16. Serializer VOD Diagram
FIGURE 17. AC Coupled Application
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