PC8374L Datasheet, PDF (3/239 Pages) National Semiconductor (TI) – SensorPathTM SuperI/O with Glue Functions

Winbond Electronics Corp. Advanced PC Product Center
Features (Continued)
■ Configuration Control
— PnP Configuration Register structure
— PC01 Specification Revision 1.0, 1999-2000 compliant
— Base Address strap (BADDR) to setup the address
of the Index-Data register pair (defaults to 2Eh/2Fh)
— Flexible resource allocation for all logical devices:
❏ Relocatable base address
❏ 15 IRQ routing options to serial IRQ
❏ Up to four optional 8-bit DMA channels
— Configurable feature sets:
❏ Software selectable
❏ V_SB3-powered pin multiplexing
Legacy Modules
■ Serial Ports 1 and 2
— Software-compatible with the NS16550A and NS16450
— Support shadow register for write-only bit monitoring
— Data rates up to 1.5 Mbaud
■ Serial Infrared Port (SIR)
— Software compatible with the 16550A and the 16450
— Shadow register support for write-only bit monitoring
— HP-SIR
— ASK-IR option of SHARP-IR
— DASK-IR option of SHARP-IR
— Consumer Remote Control supports RC-5, RC-6,
NEC, RCA and RECS 80
■ IEEE 1284-compliant Parallel Port
— ECP, with Level 2 (14 mA sink and source output buffers)
— Software or hardware control
— Enhanced Parallel Port (EPP) compatible with EPP
1.7 and EPP 1.9
— Supports EPP as mode 4 of the Extended Control
Register (ECR)
— Selection of internal pull-up or pull-down resistor for
Paper End (PE) pin
— Supports a demand DMA mode mechanism and a
DMA fairness mechanism for improved bus utilization
— Protection circuit that prevents damage to the
parallel port when a printer connected to it is pow-
ered up or is operated at high voltages (in both
cases, even if the PC8374L is in power-down state)
■ Floppy Disk Controller (FDC)
— Software compatible with the PC8477 (the PC8477
contains a superset of the FDC functions in the
µDP8473, NEC µPD765A/B and N82077 devices)
— Error-free handling of data overrun and underrun
— Programmable write protect
— Supports FM and MFM modes
— Supports Enhanced mode command for three-mode
Floppy Disk Drive (FDD)
— Perpendicular recording drive support for 2.88 MBytes
— Burst (16-byte FIFO) and Non-Burst modes
— Full support for IBM Tape Drive Register (TDR) im-
plementation of AT and PS/2 drive types
— High-performance digital separator
— Supports fast tape drives (2 Mbps) and standard
tape drives (1 Mbps, 500 Kbps and 250 Kbps)
■ Keyboard and Mouse Controller (KBC)
— 8-bit microcontroller, software compatible with
8042AH and PC87911
— Standard interface (60h, 64h, IRQ1 and IRQ12)
— Supports two external swapable PS/2 interfaces for
keyboard and mouse
— Programmable, dedicated quasi-bidirectional I/O
lines (GA20/P21, KBRST/P20)
Clocking, Supply, and Package Information
■ Clocks
— LPC (PCI) clock input (up to 33 MHz)
— On-chip Clock Generator:
❏ Generates 48 MHz clock
❏ Generates 32.768 KHz internal clock
❏ V_SB3 powered
❏ Based on the 14.31818 MHz clock input
■ Protection
— All pins are 5V tolerant and back-drive protected
(except LPC bus pins)
— High ESD protection of all the pins
— Pin multiplexing selection lock
— Configuration register lock
■ Testability
— XOR tree structure
❏ Includes all the pins (except supply, analog and not
connected pins)
❏ Selected at power-up by strap input (TEST)
— TRI-STATE pins, selected at power-up by strap input
(TRIS)
■ Power Supply
— 3.3V supply operation
— Separate pin pairs for main (V_DD3) and standby
(V_SB3) power supplies
— Backup battery input (V_BAT) for SWC indications
— Low standby power consumption
— Very low power consumption from backup battery
(less than 0.5 µA)
■ Package
— 128-pin PQFP
Revision 1.1
3
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