PC8374L Datasheet, PDF (210/239 Pages) National Semiconductor (TI) – SensorPathTM SuperI/O with Glue Functions

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9.0 Legacy Functional Blocks (Continued)
Table 101. Bank 6 Register Map
Offset Mnemonic
Register Name
02h
SIR_PW
03h
BSR
04-07h
SIR Pulse Width Control
Bank Select
Reserved
Type
R/W
R/W
Table 102. Bank 7 Register Map
Offset Mnemonic
Register Name
00h
IRRXDC
01h
IRTXMC
02h
RCCFG
03h
BSR
04h
IRCFG1
05h-06h
07h
IRCFG4
IR Receiver Demodulator Control
IR Transmitter Modulator Control
CEIR Configuration
Bank Select
IR Interface Configuration 1
Reserved
IR Interface Configuration 4
Type
R/W
R/W
R/W
R/W
R/W
R/W
9.6 KEYBOARD AND MOUSE CONTROLLER (KBC)
9.6.1 General Description
The KBC is implemented physically as a single hardware module and houses two separate logical devices: a mouse con-
troller (Logical Device 5) and a keyboard controller (Logical Device 6). The KBC is functionally equivalent to the industry
standard 8042AH keyboard controller. The 8042AH datasheet can be used as a detailed technical reference for the KBC.
The hardware KBC module is integrated to provide the following pin functions: KBRST (P20), GA20 (P21), KBDAT, KBCLK,
MDAT and MCLK. KBRST and GA20 are implemented as bi-directional open-drain pins with internal active pull-up. The key-
board and mouse interfaces are implemented as bi-directional open-drain pins. Their internal connections are shown in Fig-
ure 41.
Ports P10-P17 and P22-P27 of the KBC core are not available on dedicated pins; neither are T0 and T1. P10, P11, P22,
P23, P26, P27, T0 and T1 are used to implement the keyboard and mouse interface.
The KBC executes a program fetched from an on-chip 2 Kbyte ROM. The code programmed in this ROM is user-customiz-
able. The KBC has two interrupt request signals: one for the keyboard and one for the mouse. The interrupt requests are
implemented using ports P24 and P25 of the KBC core. The interrupt requests are controlled exclusively by the KBC firm-
ware, except for the IRQ type and number, which are set by configuration registers (see Section 3.2.3 on page 39).
The interrupt requests are implemented as bi-directional signals. When an I/O port is read, all unused bits return the value
latched in the output registers of the ports.
For KBC firmware that implements interrupt-on-OBF schemes, the following is the recommended implementation:
1. Put the data in DBBOUT.
2. Set the appropriate port bit to issue an interrupt request.
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