HPC16064 Datasheet, PDF (27/36 Pages) National Semiconductor (TI) – High-Performance microController

Design Considerations
Designs using the HPC family of 16-bit high speed CMOS
microcontrollers need to follow some general guidelines on
usage and board layout
Floating inputs are a frequently overlooked problem CMOS
inputs have extremely high impedance and if left open can
float to any voltage You should thus tie unused inputs to
V_CC or ground either through a resistor or directly Unlike
the inputs unused output should be left floating to allow the
output to switch without drawing any DC current
To reduce voltage transients keep the supply line’s parasit-
ic inductances as low as possible by reducing trace lengths
using wide traces ground planes and by decoupling the
supply with bypass capacitors In order to prevent additional
voltage spiking this local bypass capacitor must exhibit low
inductive reactance You should therefore use high frequen-
cy ceramic capacitors and place them very near the IC to
minimize wiring inductance
 Keep V_CC bus routing short When using double sided or
multilayer circuit boards use ground plane techniques
 Keep ground lines short and on PC boards make them
as wide as possible even if trace width varies Use sepa-
rate ground traces to supply high current devices such as
relay and transmission line drivers
 In systems mixing linear and logic functions and where
supply noise is critical to the analog components’ per-
formance provide separate supply buses or even sepa-
rate supplies
 If you use local regulators bypass their inputs with a tan-
talum capacitor of at least 1 mF and bypass their outputs
with a 10 mF to 50 mF tantalum or aluminum electrolytic
capacitor
 If the system uses a centralized regulated power supply
use a 10 mF to 20 mF tantalum electrolytic capacitor or a
50 mF to 100 mF aluminum electrolytic capacitor to de-
couple the V_CC bus connected to the circuit board
 Provide localized decoupling For random logic a rule of
thumb dictates approximately 10 nF (spaced within
12 cm) per every two to five packages and 100 nF for
every 10 packages You can group these capacitances
but it’s more effective to distribute them among the ICs If
the design has a fair amount of synchronous logic with
outputs that tend to switch simultaneously additional de-
coupling might be advisable Octal flip-flop and buffers in
bus-oriented circuits might also require more decoupling
Note that wire-wrapped circuits can require more decou-
pling than ground plane or multilayer PC boards
A recommended crystal oscillator circuit to be used with the
HPC is shown in Figure 29 See Table V for recommended
component values The recommended values given in Ta-
ble V have yielded consistent results and are made to
match a crystal with a 20 pF load capacitance with some
small allowance for layout capacitance
A recommended layout for the oscillator network should be
as close to the processor as physically possible entirely
within ‘‘1’’ distance This is to reduce lead inductance from
long PC traces as well as interference from other compo-
nents and reduce trace capacitance The layout contains a
large ground plane either on the top or bottom surface of
the board to provide signal shielding and a convenient loca-
tion to ground both the HPC and the case of the crystal
It is very critical to have an extremely clean power supply for
the HPC crystal oscillator Ideally one would like a V_CC and
ground plane that provide low inductance power lines to the
chip The power planes in the PC board should be decou-
pled with three decoupling capacitors as close to the chip
as possible A 1 0 mF a 0 1 mF and a 0 001 mF dipped mica
or ceramic cap mounted as close to the HPC as is physically
possible on the board using the shortest leads or surface
mount components This should provide a stable power
supply and noiseless ground plane which will vastly im-
prove the performance of the crystal oscillator network
TABLE V HPC Oscillator Table
XTAL
Freq
(MHz)
s₂
4
6
8
10
12
14
16
18
20
22
24
26
28
30
R₁ (X)
1500
1200
910
750
600
470
390
300
220
180
150
120
100
75
62
R_F 3 3 MX
C₁ 27 pF
TL DD 11372 31
C₂ 33F
XTAL Specifications The crystal used was an M-TRON Industries MP-1 Se-
ries XTAL ‘‘AT’’ cut parallel resonant
C_L 20 pF
Series Resistance is
25X 25 MHz
40X 10 MHz
600X 2 MHz
FIGURE 29 Recommended Crystal Circuit
HPC46064 CPU
The HPC46064 CPU has a 16-bit ALU and six 16-bit regis-
ters
Arithmetic Logic Unit (ALU)
The ALU is 16 bits wide and can do 16-bit add subtract and
shift or logic AND OR and exclusive OR in one timing cycle
The ALU can also output the carry bit to a 1-bit C register
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