HPC16064 Datasheet, PDF (26/36 Pages) National Semiconductor (TI) – High-Performance microController

Memory
The HPC46064 has been designed to offer flexibility in
memory usage A total address space of 64 Kbytes can be
addressed with 16 Kbytes of ROM and 512 bytes of RAM
available on the chip itself The ROM may contain program
instructions constants or data The ROM and RAM share
the same address space allowing instructions to be execut-
ed out of RAM
Program memory addressing is accomplished by the 16-bit
program counter on a byte basis Memory can be addressed
directly by instructions or indirectly through the B X and SP
registers Memory can be addressed as words or bytes
Words are always addressed on even-byte boundaries The
HPC46064 uses memory-mapped organization to support
registers I O and on-chip peripheral functions
The HPC46064 memory address space extends to
64 Kbytes and registers and I O are mapped as shown in
Table IV
TABLE IV HPC46064 Memory Map
FFFF FFF0
FFEF FFD0
FFCF FFCE
C001 C000
Interrupt Vectors
JSRP Vectors
( ^{On-Chip ROM}
USER MEMORY
( ^{BFFF BFFE}
0301 0300
External Expansion
Memory
02FF 02FE
( 01C1 01C0
On-Chip RAM
USER RAM
0195 0194 WATCHDOG Address WATCHDOG Logic
0192
0191 0190
018F 018E
018D 018C
018B 018A
0189 0188
0187 0186
0185 0184
0183 0182
0181 0180
T0CON Register
TMMODE Register
DIVBY Register
T3 Timer
R3 Register
T2 Timer
R2 Register
I2CR Register R1
I3CR Register T1
I4CR Register
Timer Block T0 T3
015E 015F
015C
0153 0152
0151 0150
014F 014E
014D 014C
014B 014A
0149 0148
0147 0146
0145 0144
0143 0142
0141 0140
EICR
EICON
Port P Register
PWMODE Register
R7 Register
T7 Timer
R6 Register
T6 Timer
R5 Register
T5 Timer
R4 Register
T4 Timer
Timer Block T4 T7
0128
0126
0124
0122
0120
0104
00F5 00F4
00F3 00F2
00F1 00F0
00E6
00E3 00E2
00E1 00E0
00DE
00DD 00DC
00D8
00D6
00D4
00D2
00D0
00CF 00CE
00CD 00CC
00CB 00CA
00C9 00C8
00C7 00C6
00C5 00C4
00C3 00C2
00C0
00BF 00BE
0001 0000
ENUR Register
TBUF Register
RBUF Register
ENUI Register
ENU Register
Port D Input Register
BFUN Register
DIR B Register
DIR A Register IBUF
UPIC Register
Port B
Port A OBUF
Reserved
HALT Enable Register
Port I Input Register
SIO Register
IRCD Register
IRPD Register
ENIR Register
X Register
B Register
K Register
A Register
PC Register
SP Register
Reserved
PSW Register
On-Chip
RAM
UART
PORTS A B
CONTROL
UPI CONTROL
PORTS A B
PORT CONTROL
INTERRUPT
CONTROL
REGISTERS
HPC CORE
REGISTERS
USER RAM
Note The HPC46064 On-Chip ROM is on addresses C000 FFFF and the
External Expansion Memory is 0300 BFFF The HPC46004 have no On-Chip
ROM External Memory is 0300 FFFF
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