COP8ACC Datasheet, PDF (21/43 Pages) National Semiconductor (TI) – 8-Bit CMOS ROM Based and OTP Microcontrollers with 4k or 16k Memory and High Resolution A/D

Analog Function Block (Continued)
CMPISEL2
0
0
0
0
1
1
1
1
Control Bit
CMPISEL1
0
0
1
1
0
0
1
1
TABLE 4. Comparator Input Selection
CMPISEL0
0
1
0
1
0
1
0
1
Comparator
Input Source
Neg.
Pos.
Input
Input
I1
I2 CH2
I1
I2 CH2
I1
I3 CH3
I1
I0 CH1
I1
I4 CH4
I1
I5 CH5
I1
I6 CH6
I1
V_CC/2
Ref.
Comparator
Output
I3
I7
I7
I7
I7
I7
I7
I7
Reset
The state of the Analog Block immediately after RESET is as
follows:
1. The CMPSL Register is set to all zeros
2. The Comparator is disabled
3. The Constant Current Source is disabled
4. CMPNEG is turned off
5. The Port I inputs are electrically isolated from the com-
parator
6. The Capture Timer input is connected to GND
7. CMPISEL0–CMPISEL2 are set to zero
8. All Port I inputs are selected to the default digital input
mode
The comparator outputs have the same specification as
Ports L and G except that the rise and fall times are sym-
metrical.
Interrupts
INTRODUCTION
Each device supports eight vectored interrupts. Interrupt
sources include Timer 0, Timer 1, Timer 2, Timer 3, Port L
Wakeup, Software Trap, MICROWIRE/PLUS, and External
Input.
All interrupts force a branch to location 00FF Hex in program
memory. The VIS instruction may be used to vector to the
appropriate service routine from location 00FF Hex.
The Software trap has the highest priority while the default
VIS has the lowest priority.
Each of the 8 maskable inputs has a fixed arbitration ranking
and vector.
Figure 14 shows the Interrupt Block Diagram.
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