COP87L88RW Datasheet, PDF (21/42 Pages) National Semiconductor (TI) – 8-Bit One-Time Programmable OTP Microcontroller with Pulse Train Generators and Capture Modules

UART
The device contains a full-duplex software programmable
UART The UART (Figure 14 ) consists of a transmit shift
register a receive shift register and seven addressable reg-
isters as follows a transmit buffer register (TBUF) a receiv-
er buffer register (RBUF) a UART control and status regis-
ter (ENU) a UART receive control and status register
(ENUR) a UART interrupt and clock source register (ENUI)
a prescaler select register (PSR) and baud (BAUD) register
The ENU register contains flags for transmit and receive
functions this register also determines the length of the
data frame (7 8 or 9 bits) the value of the ninth bit in trans-
mission and parity selection bits The ENUR register flags
framing data overrun and parity errors while the UART is
receiving
Other functions of the ENUR register include saving the
ninth bit received in the data frame enabling or disabling the
UART’s attention mode of operation and providing addition-
al receiver transmitter status information via RCVG and
XMTG bits The determination of an internal or external
clock source is done by the ENUI register as well as select-
ing the number of stop bits and enabling or disabling trans-
mit and receive interrupts A control flag in this register can
also select the UART mode of operation asynchronous or
synchronous
FIGURE 14 UART Block Diagram
TL DD 12855 – 14
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