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LP3906 Datasheet, PDF (19/38 Pages) National Semiconductor (TI) – Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C Compatible Interface
LP3906 Default Power-Up Sequence
20197810
Power-On Timing Specification
Symbol
Description
t1
Programmable Delay from EN_T assertion to VCC_Buck1 On
t2
Programmable Delay from EN_T assertion to VCC_Buck2 On
t3
Programmable Delay from EN_T assertion to VCC_LDO1 On
t4
Programmable Delay from EN_T assertion to VCC_LDO2 On
Min
Typ
Max
Units
1.5
ms
2
ms
3
ms
6
ms
Note: LP3906 The default Power on delays can be reprogrammed at final test or I2C to 1, 1.5, 2, 3, 6, or 11 ms.
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