COP410L Datasheet, PDF (17/20 Pages) National Semiconductor (TI) – Single-Chip N-Channel Microcontrollers

Description of Selected Instructions
The following information is provided to assist the user in
understanding the operation of several unique instructions
and to provide notes useful to programmers in writing
COP410L 411L programs
XAS INSTRUCTION
XAS (Exchange A with SIO) exchanges the 4-bit contents of
the accumulator with the 4-bit contents of the SIO register
The contents of SIO will contain serial-in serial-out shift reg-
ister or binary counter data depending on the value of the
EN register An XAS instruction will also affect the SK out-
put (See Functional Description EN Register above ) If
SIO is selected as a shift register an XAS instruction must
be performed once every 4 instruction cycles to effect a
continuous data stream
JID INSTRUCTION
JID (Jump Indirect) is an indirect addressing instruction
transferring program control to a new ROM location pointed
to indirectly by A and M It loads the lower 8 bits of the ROM
address register PC with the contents of ROM addressed by
the 9-bit word PC₈ A M PC₈ is not affected by this instruc-
tion
Note that JID requires 2 instruction cycles to execute
LQID INSTRUCTION
LQID (Load Q Indirect) loads the 8-bit Q register with the
contents of ROM pointed to by the 9-bit word PC₈ A M
LQID can be used for table lookup or code conversion such
as BCD to seven-segment The LQID instruction ‘‘pushes’’
x x the stack (PC a 1 SA SB) and replaces the least
x significant 8 bits of PC as follows A
PC_{7 4} RAM(B)
x PC_{3 0} leaving PC₈ unchanged The ROM data pointed
to by the new address is fetched and loaded into the Q
x x latches Next the stack is ‘‘popped’’ (SB
SA
PC)
restoring the saved value of PC to continue sequential pro-
x gram execution Since LQID pushes SA
SB the previ-
ous contents of SB are lost Also when LQID pops the
stack the previously pushed contents of SA are left in SB
The net result is that the contents of SA are placed in SB
x (SA
SB) Note that LQID takes two instruction cycle
times to execute
INSTRUCTION SET NOTES
a The first word of a COP410L 411L program (ROM ad-
dress 0) must be a CLRA (Clear A) instruction
b Although skipped instructions are not executed one in-
struction cycle time is devoted to skipping each byte of
the skipped instruction Thus all program paths except
JID and LQID take the same number of cycle times
whether instructions are skipped or executed JID and
LQID instructions take 2 cycles if executed and 1 cycle if
skipped
c The ROM is organized into 8 pages of 64 words each
The Program Counter is a 9-bit binary counter and will
count through page boundaries If a JP JSRP JID or
LQID instruction is located in the last word of a page the
instruction operates as if it were in the next page For
example a JP located in the last word of a page will jump
to a location in the next page Also a LQID or JID located
in the last word of page 3 or 7 will access data in the next
group of 4 pages
Option List
The COP410L 411L mask-programmable options are as-
signed numbers which correspond with the COP410L pins
The following is a list of COP410L options The LED Direct
Drive option on the L Lines cannot be used if higher V_CC
option is selected When specifying a COP411L chip Option
2 must be set to 3 Options 20 21 and 22 to 0 The options
are programmed at the same time as the ROM pattern to
provide the user with the hardware flexibility to interface to
various I O components using little or no external circuitry
Option 1 e 0 Ground Pin no options available
Option 2 CKO Output (no option available for COP411L)
e 0 Clock output to ceramic resonator
e 1 Pin is RAM power supply (V_R) input
e 3 No connection
Option 3 CKI Input
e 0 Oscillator input divided by 8 (500 kHz max)
e 1 Single-pin RC controlled oscillator divided by 4
e 2 External Schmitt trigger level clock divided by 4
Option 4 RESET Input
e 0 Load device to V_CC
e 1 Hi-Z input
Option 5 L₇ Driver
e 0 Standard output
e 1 Open-drain output
e 2 High current LED direct segment drive output
e 3 High current TRI-STATE push-pull output
e 4 Low-current LED direct segment drive output
e 5 Low-current TRI-STATE push-pull output
Option 6 L₆ Driver
same as Option 5
Option 7 L₅ Driver
same as Option 5
Option 8 L₄ Driver
same as Option 5
Option 9 Operating voltage
COP41XL
e 0 a4 5V to a6 3V
COP31XL
a4 5V to a5 5V
Option 10 L₃ Driver
same as Option 5
Option 11 L₂ Driver
same as Option 5
Option 12 L₁ Driver
same as Option 5
Option 13 L₀ Driver
same as Option 5
Option 14 SI Input
e 0 load device to V_CC
e 1 Hi-Z input
Option 15 SO Driver
e 0 Standard Output
e 1 Open-drain output
e 2 Push-pull output
Option 16 SK Driver
same as Option 15
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