COP410L Datasheet, PDF (16/20 Pages) National Semiconductor (TI) – Single-Chip N-Channel Microcontrollers

Instruction Set (Continued)
TABLE III COP410L 411L Instruction Set (Continued)
Mnemonic
Operand
Hex
Code
Machine
Language Code
(Binary)
REGISTER REFERENCE INSTRUCTIONS
CAB
50
0101 0000
Data Flow
A x Bd
Skip Conditions
None
Description
Copy A to Bd
CBA
4E
0100 1110
Bd x A
None
Copy Bd to A
LBI
rd
––
x 00 r (d b 1) r d B
(d e 0 9 15)
Skip until not a LBI Load B Immediate with
r d (Note 5)
LEI
y
33
6–
TEST INSTRUCTIONS
SKC
20
0011 0011
0110 y
y x EN
0010 0000
None
C e ‘‘1’’
Load EN Immediate
(Note 6)
Skip if C is True
SKE
21
0010 0001
A e RAM(B)
Skip if A Equals RAM
SKGZ
33
0011 0011
21
0010 0001
G_{3 0} e 0
Skip if G is Zero
(all 4 bits)
SKGBZ
33
0
01
1
11
2
03
3
13
SKMBZ
0
01
1
11
2
03
3
13
INPUT OUTPUT INSTRUCTIONS
ING
33
2A
0011 0011
0000 0001
0001 0001
0000 0011
0001 0011
0000 0001
0001 0001
0000 0011
0001 0011
0011 0011
0010 1010
1st byte
2nd byte
*
GxA
G₀ e 0
G₁ e 0
G₂ e 0
G₃ e 0
RAM(B)₀ e 0
RAM(B)₁ e 0
RAM(B)₂ e 0
RAM(B)₃ e 0
None
Skip if G Bit is Zero
Skip if RAM Bit is Zero
Input G Ports to A
INL
OBD
33
0011 0011
x L_{7 4}
RAM(B)
2E
0010 1110
x L_{3 0}
A
33
0011 0011
Bd x D
3E
0011 1110
None
None
Input L Ports to RAM A
Output Bd to D Outputs
OMG
33
0011 0011
RAM(B) x G
3A
0011 1010
None
Output RAM to G Ports
XAS
4F
0100 1111
A
x SIO C SKL None
Exchange A with SIO
(Note 2)
Note 1 All subscripts for alphabetical symbols indicate bit numbers unless explicitly defined (e g Br and Bd are explicitly defined) Bits are numbered 0 to N where
0 signifies the least significant bit (low-order right-most bit) For example A₃ indicates the most significant (left-most) bit of the 4-bit A register
Note 2 For additional information on the operation of the XAS JID and LQID instructions see below
Note 3 The JP instruction allows a jump while in subroutine pages 2 or 3 to any ROM location within the two-page boundary of pages 2 or 3 The JP instruction
otherwise permits a jump to a ROM location within the current 64-word page JP may not jump to the last word of a page
Note 4 A JSRP transfers program control to subroutine page 2 (0010 is loaded into the upper 4 bits of P) A JSRP may not be used when in pages 2 or 3 JSRP
may not jump to the last word in page 2
Note 5 The machine code for the lower 4 bits of the LBI instruction equals the binary value of the ‘‘d’’ data minus 1 e g to load the lower four bits of B (Bd) with
the value 9 (1001₂) the lower 4 bits of the LBI instruction equal 8 (1000₂) To load 0 the lower 4 bits of the LBI instruction should equal 15 (1111₂)
Note 6 Machine code for operand field y for LEI instruction should equal the binary value to be latched into EN where a ‘‘1’’ or ‘‘0’’ in each bit of EN corresponds
with the selection or deselection of a particular function associated with each bit (See Functional Description EN Register )
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