COP404C Datasheet, PDF (13/18 Pages) National Semiconductor (TI) – COP404C ROMless CMOS Microcontrollers

Instruction Set (Continued)
TABLE III COP404C Instruction Set (Continued)
Mnemonic
Operand
Hex
Code
Machine
Language
Code
(Binary)
Data Flow
Skip
Conditions
INPUT OUTPUT INSTRUCTIONS
ING
ININ
INIL
INL
OBD
OGI
OMG
XAS
33
l⁰⁰¹¹l⁰⁰¹¹l ^{G x A}
None
2A
l⁰⁰¹⁰l¹⁰¹⁰l
33
l⁰⁰¹¹l⁰⁰¹¹l ^{IN x A}
None
28
l⁰⁰¹⁰l¹⁰⁰⁰l
33
x _l0011_l0011_l IL₃ CKO ‘‘0’’ IL₀ A None
29
l⁰⁰¹⁰l¹⁰⁰¹l
33
l⁰⁰¹¹l⁰⁰¹¹l ^L7 4 x RAM(B)
None
2E
l⁰⁰¹⁰l¹¹¹⁰l
x L_{3 0}
A
33
l⁰⁰¹¹l⁰⁰¹¹l ^{Bd x D}
None
3E
l⁰⁰¹¹l¹¹¹⁰l
y
33
l⁰⁰¹¹l⁰⁰¹¹l ^{y x G}
None
5b _l0101_l y _l
33
l⁰⁰¹¹l⁰⁰¹¹l ^{RAM(B) x G}
None
3A
l⁰⁰¹¹l¹⁰¹⁰l
4F
l⁰¹⁰⁰l¹¹¹¹l ^A
x SIO C SKL None
Description
Input G Ports to A
Input IN Inputs to A
Input IL Latches to A
(Note 2)
Input L Ports to RAM A
Output Bd to D Outputs
Output to G Ports
Immediate
Output RAM to G Ports
Exchange A with SIO
(Note 2)
Note 1 All subscripts for alphabetical symbols indicate bit numbers unless explicitly defined (e g Br and Bd are explicitly defined) Bits are numbered O to N where
O signifies the least significant bit (low-order right-most bit) For example A₃ indicates the most significant (left-most) bit of the 4-bit A register
Note 2 For additional information on the operation of the XAS JID LQID INIL and SKT instructions see below
Note 3 The JP instruction allows a jump while in subroutine pages 2 or 3 to any ROM location within the two-page boundary of pages 2 or 3 The JP instruction
otherwise permits a jump to a ROM location within the current 64-word page JP may not jump to the last word of a page
Note 4 A JSRP transfers program control to subroutine page 2 (0010 is loaded into the upper 4 bits of P) A JSRP may not be used when in pages 2 or 3 JSRP
may not jump to the last word in page 2
Note 5 LBI is a single-byte instruction if d e 0 9 10 11 12 13 14 or 15 The machine code for the lower 4 bits equals the binary value of the ‘‘d’’ data minus 1
e g to load the lower four bits of B(Bd) with the value 9 (1001₂) the lower 4 bits of the LBI instruction equal 8 (1000₂) To load 0 the lower 4 bits of the LBI
instruction should equal 15 (1111₂)
Note 6 Machine code for operand field y for LEI instruction should equal the binary value to be latched into EN where a ‘‘1’’ or ‘‘0’’ in each bit of EN corresponds
with the selection or deselection of a particular function associated with each bit (See Functional Description EN Register )
Note 7 If SEL2O e 1 A
Br (0 x A3)
If SEL2O e 0 A
x Br (0 0
A3 A2)
Description of Selected Instructions
XAS INSTRUCTION
XAS (Exchange A with SIO) copies C to the SKL latch and
exchanges the accumulator with the 4-bit contents of the
SIO register The contents of SIO will contain serial-in seri-
al-out shift register or binary counter data depending on the
value of the EN register If SIO is selected as a shift register
an XAS instruction can be performed once every 4 instruc-
tion cycles to effect a continuous data stream
LQID INSTRUCTION
LQID (Load Q Indirect) loads the 8-bit Q register with the
contents of ROM pointed to by the 11-bit word PC10 PC8
A M LQID can be used for table lookup or code conversion
such as BCD to seven-segment The LQID instruction
x x x ‘‘pushes’’ the stack (PC a 1 SA SB SC) and
replaces the least significant 8 bits of the PC as follows A
x x PC (7 4) RAM(B)
PC(3 0) leaving PC(10) PC(9)
and PC(8) unchanged The ROM data pointed to by the
new address is fetched and loaded into the Q latches Next
x x x the stack is ‘‘popped’’ (SC
SB
SA
PC) re-
storing the saved value of PC to continue sequential pro-
x gram execution Since LQID pushes SB
SC the previ-
ous contents of SC are lost
Note LQID uses 2 instruction cycles if executed one if
skipped
JID INSTRUCTION
JID (Jump Indirect) is an indirect addressing instruction
transferring program control to a new ROM location pointed
to indirectly by A and M It loads the lower 8 bits of the ROM
address register PC with the contents of ROM addressed by
the 11-bit word PC10 8 A M PC10 PC9 and PC8 are not
affected by JID
Note JID uses 2 instruction cycles if executed one if
skipped
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