COP404C Datasheet, PDF (11/18 Pages) National Semiconductor (TI) – COP404C ROMless CMOS Microcontrollers

Instruction Set (Continued)
TABLE III COP404C Instruction Set
Mnemonic
Operand
Hex
Code
ARITHMETIC INSTRUCTIONS
ASC
30
Machine
Language
Code (Binary)
l⁰⁰¹¹l⁰⁰⁰⁰l
ADD
ADT
AISC
31 _l0011_l0001_l
4A _l0011_l0001_l
y
5b _l0101_l y _l
CASC
10 _l0001_l0000_l
CLRA
COMP
NOP
RC
SC
XOR
00 _l0000_l0000_l
40 _l0100_l0000_l
44 _l0100_l0100_l
32 _l0011_l0010_l
22 _l0010_l0010_l
02 _l0000_l0010_l
TRANSFER OF CONTROL INSTRUCTIONS
JID
JMP
JP
JSRP
FF _l1111_l1111_l
a
6b _l0110_l0_la_{10 8l}
l ^a7 0 l
a
l¹l ^a6 0 l
(pages 2 3 only)
or
l¹¹l ^a5 0 l
(all other pages)
a
l¹⁰l ^a5 0 l
JSR
RET
RETSK
a
6b _l0110_l1_la_{10 8l}
l ^a7 0 l
48 _l0100_l1000_l
49 _l0100_l1001_l
HALT
IT
33 _l0011_l0011_l
38 _l0011_l1000_l
33 _l0011_l0011_l
39 _l0011_l1001_l
MEMORY REFERENCE INSTRUCTIONS
CAMT
CTMA
CAMQ
CQMA
LD
LDD
LQID
33 _l0011_l0011_l
3F _l0011_l1111_l
33 _l0011_l0011_l
2F _l0010_l1111_l
33 _l0011_l0011_l
3C _l0011_l1100_l
33 _l0011_l0011_l
2C _l0010_l1100_l
r
b5 _l00_l r _l0101_l
(re0 3)
rd
23 _l0010_l0011_l
l⁰l ^r l ^d l
BF _l1011_l1111_l
RMB
0
4C _l0100_l1100_l
1
45 _l0100_l0101_l
2
42 _l0100_l0010_l
3
43 _l0100_l0011_l
Data Flow
x AaCaRAM(B) A
Carry x C
x AaRAM(B) A
x Aa10₁₀
A
Aay x A
x AaRAM(B)aC A
Carry x C
0xA
AxA
None
‘‘0’’ x C
‘‘1’’ x C
x A Z RAM(B) A
x ROM (PC_{10 8} A M)
PC_{7 0}
a x PC
x a
PC_{6 0}
x a
PC_{5 0}
PCa1 x SA x SB x SC
x 00010 PC_{10 6}
x a
PC_{5 0}
PCa1 x SA x SB x SC
a x PC
SC x SB x SA x PC
SC x SB x SA x PC
x A
T_{7 4}
x RAM(B)
T_{3 0}
x T_{7 44}
RAM(B)
x T_{3 0}
A
x A
Q_{7 4}
x RAM(B) Q_{3 0}
x Q_{7 4}
RAM(B)
x Q_{3 0}
A
RAM(B) x A
x Br Z r
Br
x RAM(r d) A
ROM(PC_{10 8 A M) x Q}
SB x SC
x 0
RAM(B)₀
x 0
RAM(B)₁
x 0
RAM(B)₂
x 0
RAM(B)₃
Skip
Conditions
Carry
None
None
Carry
Carry
None
None
None
None
None
None
None
None
None
None
None
None
Always Skip
on Return
None
None
None
None
None
None
None
None
None
None
Description
Add with Carry Skip on
Carry
Add RAM to A
Add Ten to A
Add Immediate Skip on
Carry (y ⁱ 0)
Compliment and Add with
Carry Skip on Carry
Clear A
Ones complement of A to A
No Operation
Reset C
Set C
Exclusive-OR RAM with A
Jump Indirect (note 2)
Jump
Jump within Page (Note 3)
Jump to Subroutine Page
(Note 4)
Jump to Subroutine
Return from Subroutine
Return from Subroutine
then Skip
HALT processor
IDLE till timer
overflows then continues
Copy A RAM to T
Copy T to RAM A
Copy A RAM to Q
Copy Q to RAM A
Load RAM into A
Exclusive-OR Br with r
Load A with RAM pointed
to direct by r d
Load Q Indirect (Note 2)
Reset RAM Bit
11