LP2975 Datasheet, PDF (11/19 Pages) National Semiconductor (TI) – MOSFET LDO Driver/Controller

Application Hints (Continued)
FET in low power designs. Because of the increased cell
density (and tiny packages) used by modern FET’s, the cur-
rent carrying capability may easily exceed the power dissipa-
tion limits of the package. It is possible to parallel two or
more FET’s, which divides the power dissipation among all
of the packages.
It should be noted that the “heatsink” for a surface mount
package is the copper of the PC board and the package itself
(direct radiation).
Surface-mount devices have the value of θ_J-A specified for a
typical PC board mounting on their data sheet. In most cases
it is best to start with the known data for the application (P_D,
T_A, T_J) and calculate the required value of θ_J-A needed. This
value will define the type of FET and, possibly, the heatsink
required for cooling.
θ_J-A = (T_J − T_A)/P_D(MAX)
DESIGN EXAMPLE: A design is to be done with V_IN = 5V
and V_OUT = 3.3V with a maximum load current of 300 mA.
Based on these conditions, power dissipation in the FET dur-
ing normal operation would be:
P_D = (V_IN − V_OUT) x I_LOAD
Solving, we find that P_D = 0.51W. Assuming that the maxi-
mum allowable value of T_J is 150˚C and the maximum T_A is
70˚C, the value of θ_J-A is found to be 157˚C/W.
However, if this design must survive a continuous short on
the output, the power dissipated in the FET is higher:
P_D(SC) = V_IN x I_SC = 5 x 0.33 = 1.65W
(This assumes the current sense resistor is selected for an
I_SC value that is 10% higher than the required 0.3A).
The value of θ_J-A required to survive continuous short circuit
is calculated to be 49˚C/W.
Having solved for the value(s) of θ_J-A, a FET can be se-
lected. It should be noted that a FET must be used with a
θ_J-A value less than or equal to the calculated value.
HIGH POWER (≥2W) APPLICATIONS: As power dissipa-
tion increases above 2W, a FET in a larger package must be
used to obtain lower values of θ_J-A. The same formulae de-
rived in the previous section are used to calculate P_D and
θ_J-A.
Having found θ_J-A, it becomes necessary to calculate the
value of θ_S-A (the heatsink-to-ambient thermal resistance) so
that a heatsink can be selected:
Where:
θ_S-A = θ_J-A − (θ_J-C + θ_C-S)
θ_J-C is the junction-to-case thermal resistance. This pa-
rameter is the measure of thermal resistance between the
semiconductor die inside the FET and the surface of the
case of the FET where it mounts to the heatsink (the value of
θ_J-C can be found on the data sheet for the FET). A typical
FET in a TO-220 package will have a θ_J-C value of approxi-
mately 2–4˚C/W, while a device in a TO-3 package will be
about 0.5–2˚C/W.
θ_C-S is the case-to-heatsink thermal resistance, which
measures how much thermal resistance exists between the
surface of the FET and the heatsink. θ_C-S is dependent on
the package type and mounting method. A TO-220 package
with mica insulator and thermal grease secured to a heatsink
will have a θ_C-S value in the range of 1–1.5˚C/W. A TO-3
package mounted in the same manner will have a θ_C-S value
of 0.3–0.5˚C/W. The best source of information for this is
heatsink catalogs (Wakefield, AAVID, Thermalloy) since they
also sell mounting hardware.
θ_S-A is the heatsink-to-ambient thermal resistance, which
defines how well a heatsink transfers heat into the air. Once
this is determined, a heatsink must be selected which has a
value which is less than or equal to the computed value. The
value of θ_S-A is usually listed in the manufacturer’s data
sheet for a heatsink, but the information is sometimes given
in a graph of temperature rise vs. dissipated power.
DESIGN EXAMPLE: A design is to be done which takes
3.3V in and provides 2.5V out at a load current of 7A. The
power dissipation will be calculated for both normal opera-
tion and short circuit conditions.
For normal operation:
P_D = (V_IN − V_OUT) x I_LOAD = 5.6W
If the output is shorted to ground:
P_D(SC) = V_IN x I_SC = 3.3 x 7.7 = 25.4W
(Assuming that a sense resistor is selected to set the value
of I_SC 10% above the nominal 7A).
θ_J-A will be calculated assuming a maximum T_A of 70˚C and
a maximum T_J of 150˚C:
θ_J-A = (T_J − T_A)/P_D(MAX)
For normal operation:
θ_J-A = (150 − 70) / 5.6 = 14.3˚C/W
For designs which must operate with the output shorted to
ground:
θ_J-A = (150 − 70) / 25.4 = 3.2˚C/W
The value of 14.3˚C/W can be easily met using a TO-220 de-
vice. Calculating the value of θ_S-A required (assuming a
value of θ_J-C = 3˚C/W and θ_C-S = 1˚C/W):
θ_S-A = θ_J-A − (θ_J-C + θ_C-S)
θ_S-A = 14.3 − (3 + 1) = 10.3˚C/W
Any heatsink may be used with a thermal resistance ≤
10.3˚C/W @ 5.6W power dissipation (refer to manufacturer’s
data sheet curves). Examples of suitable heatsinks are Ther-
malloy #6100B and IERC #LATO127B5CB.
However, if the design must survive a sustained short on the
output, the calculated θ_J-A value of 3.2˚C/W eliminates the
possibility of using a TO-220 package device.
Assuming a TO-3 device is selected with a θ_J-C value of
1.5˚C/W and θ_C-S = 0.4˚C/W, we can calculate the required
value of θ_S-A:
θ_S-A = θ_J-A − (θ_J-C + θ_C-S)
θ_S-A = 3.2 − (1.5 + 0.4) = 1.3˚C/W
A θ_S-A value ≤1.3˚C/W would require a relatively large heat-
sink, or possibly some kind of forced airflow for cooling.
SHORT-CIRCUIT CURRENT LIMITING
Short-circuit current limiting is easiliy implemented using a
single external resistor (R_SC). The value of R_SC can be cal-
culated from:
Where:
R_SC = V_CL / I_SC
I_SC is the desired short circuit current.
V_CL is the current limit sense voltage.
The value of V_CL is 57 mV (typical), with guaranteed limits
listed in the Electrical Characteristics section. When doing a
worst-case calculation for power dissipation in the FET, it is
important to consider both the tolerance of V_CL and the toler-
ance (and temperature drift) of R_SC.
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