SM5816AF_06 Datasheet, PDF (20/27 Pages) Nippon Precision Circuits Inc – 6-channel DSD-PCM Converter

SM5816AF
CPU Interface
Timing diagrams
The CPU interface comprises 3-wire serial inputs MDATA, MSHIFT, and MLATCH.
I MDATA bit data is read into an internal interface buffer on the rising edge of MSHIFT.
I When MLATCH goes LOW, data is latched and processed.
At this point, the data read on the previous MSHIFT rising edge is treated as bit 1, and the most recently input
data bits are valid bits.
I The internal processing mode is determined by the state of bit 1.
• Bit 1 = “L”: system set mode (16 valid bits)
• Bit 1 = “H”: RAM coefficient write mode (40 valid bits)
MDATA
<LSB>
bit40
<MSB>
bit1
40 39 38 37 36 10 9 8 7 6 5 4 3 2 1
MSHIFT
MLATCH
Figure 5. Timing diagram
System setting mode (bit 1 = “L”)
In system set mode, each bit represents a function set flag, with the first 16 bits being valid. Each flag function,
when SELMCU is HIGH, performs the same function as the pin with the same name, while the state of those
pins is ignored.
Table 1. Flag set function table
Bit Flag name
Function
“H”
1
MODE System set mode select
–
2
SEL8FS PCM output data select
8fs PCM output
3
SELEXT 2fs PCM external data output select External data select
4 (Reserved) (Reserved)
–
5 (Reserved) (Reserved)
–
6 SELSBSW Subwoofer output select
Surround back output
7
SELSBR Surround back Rch output select Both Lch, Rch outputs
8 SELRAM Fixed/RAM coefficient select
RAM coefficient
9 SELFIR1
8fs FIR fixed coefficient 1-4 select
SELFIR (2, 1) (L, L)
10 SELFIR2
FIR coeff coeff 1
“L”
Tied "L"
2fs PCM output
2fs PCM output
Tied "L"
Tied "L"
Subwoofer output
Lch output only
Fixed coefficient
(L, H)
coeff 2
(H, L)
coeff 3
(H, H)
coeff 4
Default
–
“L”
“L”
“L”
“L”
“L”
“L”
“L”
“L”
“L”
11 SELDH1
Dither rounding setting
12 SELDH2
“L”
SELDH (2, 1) (L, L)
(L, H)
(H, L)
(H, H)
Dither
OFF
1LSB
2LSB
4LSB
“L”
13 DSGAIN DSD signal gain setting
50% modulation = 0dB
100% modulation = 0dB
“L”
14 MTPCM PCM signal mute
Mute-OFF
Mute-ON
“L”
15 MTDSD DSD signal mute
Mute-OFF
Mute-ON
“L”
16
SYNC Forced sync
Resync when "L" → "H"
“L”
Note. All 16 bits need to be written even when only changing one portion of the data.
SEIKO NPC CORPORATION —20