SM5816AF_06 Datasheet, PDF (12/27 Pages) Nippon Precision Circuits Inc – 6-channel DSD-PCM Converter

SM5816AF
FUNCTIONAL DESCRIPTION
Data Input/Output Formats
DSD input/output format
DSD input data is read on the rising edge of the bit clock, and output data is output on the falling edge.
DSBCKF
DSBCKB
DSI**
DSO**
(1/64fs)
DSI**: DSIFL, DSIFR, DSISL, DSISR, DSICT, DSISW pins
DSO**: DSOFL, DSOFR, DSOSL, DSOSR, DSOCT, DSOSW, DSOSBL, DSOSBR pins
8fs output format
There are two 8fs output formats that can be set using FMT8FS. Also, the F8WCK polarity can be inverted
using FMT8WCK.
(1) MSB-first left-justified 32-bit (FMT8FS = “L”)
F8WCK
(1/8fs)
F8BCK
F8**
31 30 29 28 27 26 25 24 3 2 1 0
MSB
LSB
(FMT8WCK="L")
(FMT8WCK="H")
31 30
F8**: F8FL, F8FR, F8SL, F8SR, F8CT, F8SW, F8SBL, F8SBR pins
I If more than 32 bit clock cycles are input during each word clock cycle, data following the 32nd bit are out-
put as “0”.
I When F8WCK and F8BCK are set as outputs, there are 32 fixed bit clock cycles per word clock cycle.
I Output data is in 32-bit 2s complement format.
(2) MSB-first right-justified 24-bit (FMT8FS = “H”)
(1/8fs)
F8WCK
F8BCK
F8**
(FMT8WCK="L")
(FMT8WCK="H")
;;;;³;;;;¹;;;;;;;;³;;;;⁰;;;;;;;;²;;;;⁹;;;;;;;;²;;;;⁸;;;;;;;;²⁷;;;;;;;;²;;;;⁶;;;;;;;;²;;;;⁵;;;;;;;;²;;;;⁴;;;;_M2S3B ^{22 21 20 3 2 1} _LS0B;;;;;;;;³¹;;;;;;;;³;;;;⁰;;;;;;;;
F8**: F8FL, F8FR, F8SL, F8SR, F8CT, F8SW, F8SBL, F8SBR pins
I In this format, there are 32 bit clock cycles per word clock cycle regardless of the input/output settings.
I The code bits are comprised by the 24-bit output data. The output data is output in 32-bit sign extended for-
mat (data bits are shown as slash lines)
I Output data is in 24-bit 2s complement format.
SEIKO NPC CORPORATION —12