SM5849F Datasheet, PDF (16/26 Pages) Nippon Precision Circuits Inc – Asynchronous Sample Rate Converter

SM5849AF
Table 3. Mode flag description
D1
Bit
Mode flag
Parameter
D2 to D7 (Not used) Test mode select
D8
FRATE Input/output rate
D9
HIGH
D10
F12DB
Attenuator
FFSI1
Deemphasis filter fs
select 1
D11
FFSI2
Deemphasis filter fs
select 2
Mode function select
LOW/HIGH
Select
IC test mode flags.
Not used for normal operation.
D2 to D7 should be set LOW .
HIGH
Set the input/output sample rate ratio for each
output sample
LOW
Set the input/output sample rate ratio with high
accuracy every 2048 output samples
HIGH
+12dB gain shift
LOW
No gain shift (normal operation)
fsi select
FFSI2
LOW
LOW
HIGH
HIGH
FFSI1
LOW
HIGH
LOW
HIGH
fsi
44.1kHz
48.0kHz
32.0kHz
D12
FDEEM
Deemphasis control
ON/OFF
HIGH
LOW
Deemphasis filter ON
Deemphasis filter OFF
Reset
mode
LOW
LOW
LOW
LOW
LOW
LOW
Deemphasis (DEEM, FSI1, FSI2 pins or FDEEM, FFSI1, FFSI2 flags)
The digital deemphasis filter is an IIR filter with vari-
able coefficients to faithfully reproduce the gain and
phase characteristics of analog deemphasis filters.
The filter coefficients are selected by FSI1 (or FFSI1
flag) and FSI2 (or FFSI2 flag) to correspond to the
sampling frequencies fs = 44.1, 48.0 and 32.0kHz.
Table 4. Deemphasis ON/OFF
DEEM
(MCOM = LOW)
FDEEM
(MCOM = HIGH)
HIGH
LOW
Deemphasis
ON
OFF
Table 5. Deemphasis fs select (FSI1, FSI2 pins or
FFSI1, FFSI2 flags)
MCOM = LOW (MCOM = HIGH)
FSI1 (FFSI1)
FSI2 (FFSI2)
LOW
LOW
HIGH
LOW
LOW
HIGH
HIGH
HIGH
fs
44.1kHz
48.0kHz
32.0kHz
NIPPON PRECISION CIRCUITS—16