UPD784031 Datasheet, PDF (65/90 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCONTROLLER

(3) External wait timing
Parameter
Symbol
Conditions
Delay from address to WAIT↓ input tDAWT
VDD = +5.0 V ± 10 %
Delay from ASTB↓ to WAIT↓ input tDSTWT VDD = +5.0 V ± 10 %
Hold time from ASTB↓ to WAIT tHSTWTH VDD = +5.0 V ± 10 %
Delay from ASTB↓ to WAIT↑ tDSTWTH VDD = +5.0 V ± 10 %
Delay from RD↓ to WAIT↓ input tDRWTL VDD = +5.0 V ± 10 %
Hold time from RD↓ to WAIT↓ tHRWT
VDD = +5.0 V ± 10 %
Delay from RD↓ to WAIT↑
tDRWTH VDD = +5.0 V ± 10 %
Delay from WAIT↑ to data input tDWTID VDD = +5.0 V ± 10 %
Delay from WAIT↑ to WR↑
tDWTW
Delay from WAIT↑ to RD↑
tDWTR
Delay from WR↓ to WAIT↓ input tDWWTL
VDD = +5.0 V ± 10 %
Hold time from WR↓ to WAIT tHWWT VDD = +5.0 V ± 10 %
Delay from WR↓ to WAIT↑
tDWWTH VDD = +5.0 V ± 10 %
Remarks T:
a:
n:
TCYK (system clock cycle time)
1 (during address wait), otherwise, 0
Number of wait states (n ≥ 0)
(4) Refresh timing
Parameter
Symbol
Conditions
Random read/write cycle time tRC
REFRQ low-level pulse width tWRFQL VDD = +5.0 V ± 10 %
Delay from ASTB↓ to REFRQ tDSTRFQ
Delay from RD↑ to REFRQ
tDRRFQ
Delay from WR↑ to REFRQ tDWRFQ
Delay from REFRQ↑ to ASTB tDRFQST
REFRQ high-level pulse width tWRFQH
VDD = +5.0 V ± 10 %
Remark T: TCYK (system clock cycle time)
µPD784031
MIN.
(0.5 + n) T + 5
(0.5 + n) T +10
nT + 5
nT + 10
0.5T
0.5T
nT + 5
nT + 10
MAX.
Unit
(2 + a) T - 40 ns
(2 + a) T - 60 ns
1.5T - 40
ns
1.5T - 60
ns
ns
ns
(1.5 + n) T - 40 ns
(1.5 + n) T - 60 ns
T - 50
ns
T - 70
ns
ns
ns
(1 + n) T - 40 ns
(1 + n) T - 60 ns
0.5T - 5
ns
0.5T - 10
ns
ns
ns
T - 50
ns
T - 75
ns
ns
ns
(1 + n) T - 40 ns
(1 + n) T - 70 ns
MIN.
3T
1.5T - 25
1.5T - 30
0.5T - 9
1.5T - 9
1.5T - 9
0.5T - 15
1.5T - 25
1.5T - 30
MAX.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
65