UPD784031 Datasheet, PDF (40/90 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCONTROLLER

µPD784031
(1) Three-wire serial I/O mode
This mode is designed for communication with a device incorporating a conventional synchronous serial interface.
Basically, three lines are used for communication: the serial clock line (SCK0) and serial data lines (SI0 and SO0).
In general, a handshake line is required to check the state of communication.
(2) Two-wire serial I/O mode
In this mode, 8-bit data is transferred using two lines: the serial clock line (SCL) and serial data bus (SDA).
In general, a handshake line is required to check the communication state.
8.9 Edge Detection Function
The interrupt input pins (NMI, INTP0-INTP5) are used to apply not only interrupt requests but also trigger signals
for the built-in circuits. As these pins are triggered by an edge (rising or falling) of an input signal, a function for edge
detection is incorporated. Moreover, a noise suppression function is provided to prevent erroneous edge detection
caused by noise.
Pin
NMI
INTP0-INTP3
INTP4, INTP5
Detectable edge
Noise suppression method
Rising edge or falling edge
Analog delay
Rising edge or falling edge, or both edges Clock sampling^Note
Analog delay
Note INTP0 is used for sampling clock selection.
8.10 Watchdog Timer
A watchdog timer is incorporated for CPU runaway detection. The watchdog timer, if not cleared by software within
a specified interval, generates a nonmaskable interrupt. Furthermore, once watchdog timer operation is enabled,
it cannot be disabled by software. The user can specify whether priority is placed on an interrupt based on the
watchdog timer or on an interrupt based on the NMI pin.
Figure 8-13. Block Diagram of Watchdog Timer
fCLK
Timer
fCLK/2²¹
fCLK/2²⁰
fCLK/2¹⁹
fCLK/2¹⁷
INTWDT
Clear signal
40