UPD78P324 Datasheet, PDF (56/80 Pages) NEC – 16-/8-Bit Single-Chip Microcomputers

µPD78P324, 78P324(A)
(4) µPD78P324(A2) Electrical Specifications (7/9)
Serial Operation (TA = 40 to +125 °C, VDD = +5 V ±10 %, VSS = 0 V)
Parameter
Symbol
Condition
Serial clock cycle time
tCYSK
SCK output
SCK input
Internal divide-by-eight
External clock
Serial clock low-level width tWSKL
SCK output
SCK input
Internal divide-by-eight
External clock
Serial clock high-level width tWSKH
SCK output
SCK input
Internal divide-by-eight
External clock
SI setup time (vs. SCK ↑)
tSRXSK
SI hold time (vs. SCK ↑)
tHSKRX
SCK ↓ → SO delay time
tDSKTX R = 1 kΩ , C = 100pF
MIN.
1280
1280
560
560
560
560
80
80
MAX.
210
Unit
µs
µs
ns
ns
ns
ns
ns
ns
ns
tCYK-dependent Serial Operation
Symbol
tCYSK
tWSKL
tWSKH
Condition
Calculation Formula
SCK output
Internal divide-by-eight
8T
SCK input
External clock
8T
SCK output
Internal divide-by-eight
4T–80
SCK input
External clock
4T–80
SCK output
Internal divide-by-eight
4T–80
SCK input
External clock
4T–80
MIN./MAX.
MIN.
MIN.
MIN.
MIN.
MIN.
MIN.
Unit
ns
ns
ns
ns
ns
ns
Remarks 1. T = tCYK = 1/fCLK (fCLK refers to the internal system clock frequency)
2. Among the parameters for serial operation, only those listed in this table are dependent on tCYK.
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