UPD17010 Datasheet, PDF (300/424 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE DEDICATED TO DIGITAL TUNING SYSTEM

LOOP4:
LOOP5:
LOOP6:
LOOP7:
SKT1 SIO0SF8
; Waits for data
BR
LOOP4
CALL CLK_WAIT
; Waits until SCL pin goes low
MOV DBF1, #0CH
; Sets transmit data
MOV DBF0, #3
PUT
SIO0SFR, DBF
INITFLG NOT SBACK, SIO0NWT, SIO0WRQ1, NOT SIO0WRQ0
; Releases wait
; Wait condition is falling edge of shift clock when clock counter is “9”
SKT1 SIO0SF9
; Waits for acknowledge
BR
LOOP5
CALL CLK_WAIT
; Waits until SCL pin goes low
SKF1 SBACK
BR
INIT
INITFLG SBACK, SIO0NWT, NOT SIO0WRQ1, SIO0WRQ0
; Releases wait
; Wait condition is falling edge of shift clock when clock counter is “8”
SKT1 SIO0SF8
; Waits for data
BR
LOOP6
CALL CLK_WAIT
; Waits until SCL pin goes low
INITFLG NOT SBACK, SIO0NWT, SIO0WRQ1, NOT SIO0WRQ0
; Releases wait
; Wait condition is falling edge of shift clock when clock counter is “9”
SKT1 SIO0SF9
; Waits for acknowledge
BR
LOOP7
CALL CLK_WAIT
; Waits until SCL pin goes low
SKF1 SBACK
BR
INIT
INITFLG NOT SIO0CH, SB, NOT SIO0MS, NOT SIO0TX
; I²C bus, slave, reception
INITFLG NOT SBACK, SIO0NWT, NOT SIO0WRQ1, SIO0WRQ0
; Releases wait
; Wait condition is falling edge of shift clock when clock counter is “8”
µPD17010
300