UPD17010 Datasheet, PDF (198/424 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE DEDICATED TO DIGITAL TUNING SYSTEM

µPD17010
14.7.3 Pulse swallow mode (VHF)
(1) Selecting division mode
Select the pulse swallow mode by the PLL mode select register.
(2) Pins used
When the pulse swallow mode is selected, the VCOH pin is enabled to operate.
(3) Setting reference frequency fr
Set a reference frequency by using the PLL reference clock select register.
(4) Calculating division ratio N
Calculate as follows:
N = ^fVCOH
fr
where,
fVCOH : input frequency of VCOH pin
fr
: reference frequency
(5) Example of setting PLL data
Setting the data to receive the broadcasting in the following FM band is described.
Reception frequency : 100.0 MHz (FM band)
Reference frequency : 25 kHz
Intermediate frequency : +10.7 MHz
Division ratio N is
fVCOH 100.0 + 10.7
N = _fr = _0.025
= 4428 (decimal)
= 114CH (hexadecimal)
Set data to the PLL data register (PLLR: peripheral address 41H), PLL mode select register (PLLMODE: RF
address 21H), and PLL reference clock select register (PLLRFCLK: RF address 31H) as follows:
0001
1
PLLR
0001
0100
1
4
1100
C
PLLMODE PLLRFCLK
0010
0110
VHF
25 kHz
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