UPD78F9177 Datasheet, PDF (24/56 Pages) NEC – 8-BIT SINGLE-CHIP MICROCONTROLLER

µPD78F9177, 78F9177Y
Mnemonic
Operand
Bytes Clock
Operation
Flags
Z AC CY
AND
A, #byte
2
4
A ← A ∧ byte
×
saddr, #byte
3
6
(saddr) ← (saddr) ∧ byte
×
A, r
2
4
A←A∧r
×
A, saddr
2
4
A ← A ∧ (saddr)
×
A, !addr16
3
8
A ← A ∧ (addr16)
×
A, [HL]
1
6
A ← A ∧ (HL)
×
A, [HL + byte]
2
6
A ← A ∧ (HL + byte)
×
OR
A, #byte
2
4
A ← A ∨ byte
×
saddr, #byte
3
6
(saddr) ← (saddr) ∨ byte
×
A, r
2
4
A←A∨r
×
A, saddr
2
4
A ← A ∨ (saddr)
×
A, !addr16
3
8
A ← A ∨ (addr16)
×
A, [HL]
1
6
A ← A ∨ (HL)
×
A, [HL + byte]
2
6
A ← A ∨ (HL + byte)
×
XOR
A, #byte
2
4
A ← A ∨ byte
×
saddr, #byte
3
6
(saddr) ← (saddr) ∨ byte
×
A, r
2
4
A←A∨r
×
A, saddr
2
4
A ← A ∨ (saddr)
×
A, !addr16
3
8
A ← A ∨ (addr16)
×
A, [HL]
1
6
A ← A ∨ (HL)
×
A, [HL + byte]
2
6
A ← A ∨ (HL + byte)
×
CMP
A, #byte
2
4
A – byte
×××
saddr, #byte
3
6
(saddr) – byte
×××
A, r
2
4
A–r
×××
A, saddr
2
4
A – (saddr)
×××
A, !addr16
3
8
A – (addr16)
×××
A, [HL]
1
6
A – (HL)
×××
A, [HL + byte]
2
6
A – (HL + byte)
×××
ADDW
AX, #word
3
6
AX, CY ← AX + word
×××
SUBW
AX, #word
3
6
AX, CY ← AX – word
×××
CMPW
AX, #word
3
6
AX – word
×××
INC
r
2
4
r←r+1
××
saddr
2
4
(saddr) ← (saddr) + 1
××
DEC
r
2
4
r ← r– 1
××
saddr
2
4
(saddr) ← (saddr) – 1
××
Remark One clock of an instruction is one clock of the CPU clock (fCPU) selected using the processor clock
control register (PCC).
24
Data Sheet U14022EJ1V0DS00