MC9S12DJ64 Datasheet, PDF (76/126 Pages) Motorola, Inc – MC9S12DJ64 Device User Guide V01.17

MC9S12DJ64 Device User Guide — V01.17
6.4 HCS12 Interrupt (INT) Block Description
Consult the INT Block Guide for information on the HCS12 Interrupt module.
6.5 HCS12 Background Debug (BDM) Block Description
Consult the BDM Block Guide for information on the HCS12 Background Debug module.
6.5.1 Device-specific information
When the BDM Block Guide refers to alternate clock this is equivalent to Oscillator Clock.
6.6 HCS12 Breakpoint (BKP) Block Description
Consult the BKP Block Guide for information on the HCS12 Breakpoint module.
Section 7 Clock and Reset Generator (CRG) Block
Description
Consult the CRG Block User Guide for information about the Clock and Reset Generator module.
7.1 Device-specific information
The Low Voltage Reset feature of the CRG is not available on this device.
Section 8 Oscillator (OSC) Block Description
Consult the OSC Block User Guide for information about the Oscillator module.
8.1 Device-specific information
The XCLKS input signal is active low (see 2.3.13 PE7 / NOACC / XCLKS — Port E I/O Pin 7).
Section 9 Enhanced Capture Timer (ECT) Block
Description
Consult the ECT_16B8C Block User Guide for information about the Enhanced Capture Timer module.
When the ECT_16B8C Block User Guide refers to freeze mode this is equivalent to active BDM mode.
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