MCF5307AI66B Datasheet, PDF (67/484 Pages) Motorola, Inc – Integrated Microprocessor User’s Manual

Freescale Semiconductor, Inc.
Programming Model
31
0
D0
Data registers
D1
D2
D3
D4
D5
D6
D7
31
0
A0
Address registers
A1
A2
A3
A4
A5
A6
A7
Stack pointer
PC
Program counter
CCR
Condition code register
31
0
MACSR MAC status register
ACC
MAC accumulator
MASK
MAC mask register
15
31
19
(CCR) SR
Status register
Must be zeros
VBR
Vector base register
CACR
Cache control register
ACR0
Access control register 0
ACR1
Access control register 1
RAMBAR RAM base address register
MBAR
Module base address register
Figure 2-3. ColdFire Programming Model
2.2.1 User Programming Model
As Figure 2-3 shows, the user programming model consists of the following registers:
• 16 general-purpose 32-bit registers, D0–D7 and A0–A7
• 32-bit program counter
• 8-bit condition code register
2.2.1.1 Data Registers (D0–D7)
Registers D0–D7 are used as data registers for bit, byte (8-bit), word (16-bit), and longword
(32-bit) operations. They may also be used as index registers.
2.2.1.2 Address Registers (A0–A6)
The address registers (A0–A6) can be used as software stack pointers, index registers, or
base address registers and may be used for word and longword operations.
Chapter 2. ColdFire Core
For More Information On This Product,
Go to: www.freescale.com
2-27