MCF5307AI66B Datasheet, PDF (175/484 Pages) Motorola, Inc – Integrated Microprocessor User’s Manual

Freescale Semiconductor, Inc.
Processor Status, DDATA Definition
Table 5-23. PST/DDATA Specification for Supervisor-Mode Instructions
Instruction
movec
rte
stop
wdebug
Operand Syntax
PSTDDATA
Ry,Rc
PST = 0x1
#imm
PST = 0x7, {PST = 0xB, DD = source operand}, {PST = 3},{ PST =0xB,
DD =source operand},
PST = 0x5, {[PST = 0x9AB], DD = target address}
PST = 0x1,
PST = 0xE
<ea>y
PST = 0x1, {PST = 0xB, DD = source, PST = 0xB, DD = source}
The move-to-SR and RTE instructions include an optional PST = 0x3 value, indicating an
entry into user mode. Additionally, if the execution of a RTE instruction returns the
processor to emulator mode, a multiple-cycle status of 0xD is signaled.
Similar to the exception processing mode, the stopped state (PST = 0xE) and the halted
state (PST = 0xF) display this status throughout the entire time the ColdFire processor is in
the given mode.
Chapter 5. Debug Support
For More Information On This Product,
Go to: www.freescale.com
5-47