MCF5307AI66B Datasheet, PDF (428/484 Pages) Motorola, Inc – Integrated Microprocessor User’s Manual

Freescale Semiconductor, Inc.
JTAG Register Descriptions
Test-Logic-Reset
1
TLR
0 <-- Value of TMS at rising edge of TCK
1
Run-Test-Idle
0
RTI
1
Select-DR-Scan
SeDR
1
Select-IR-Scan
SeIR
0
0
1 _Capture-DR
CaDR
1 _Capture-IR
CaIR
0
Shift-DR
ShDR
0
0
Shift-IR
ShIR
0
1
Exit1-DR
1
E1DR
1
Exit1-IR
1
E1IR
0
Pause-DR
PaDR
0
0
Pause-IR
PaIR
0
1
0 _Exit2-DR
E2DR
1
0
Exit2-IR
E2IR
1
1
Update-DR
UpDR
Update-IR
UpIR
1
0
1
0
Figure 19-2. JTAG TAP Controller State Machine
19.4 JTAG Register Descriptions
The following sections describe the JTAG registers implemented on the MCF5307.
19-4
MCF5307 User’s Manual
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