M38503MXH Datasheet, PDF (63/86 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
3850 Group (Spec. H)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Status Register (SRD)
The status register indicates operating status of the flash memory
and status such as whether an erase operation or a program ended
successfully or in error. It can be read by writing the read status reg-
ister command (7016). Also, the status register is cleared by writing
the clear status register command (5016).
Table 18 gives the definition of each status register bit. After clearing
the reset, the status register outputs “8016”.
Sequencer status (SR7)
After power-on and recover from deep power down mode, the se-
quencer status is set to “1”(ready).
Table 18 Status register (SRD)
SRD0 bits
SR7 (bit7)
SR6 (bit6)
SR5 (bit5)
SR4 (bit4)
SR3 (bit3)
SR2 (bit2)
SR1 (bit1)
SR0 (bit0)
Status name
Sequencer status
Reserved
Erase status
Program status
Reserved
Reserved
Reserved
Reserved
The sequencer status indicates the operating status of the device.
This status bit is set to “0” (busy) during write or erase operation and
is set to “1” upon completion of these operations.
Erase Status (SR5)
The erase status reports the operating status of the auto erase op-
eration. If an erase error occurs, it is set to “1”. When the erase sta-
tus is cleared, it is set to “0”.
Program Status (SR4)
The program status reports the operating status of the auto write
operation. If a write error occurs, it is set to “1”. When the program
status is cleared, it is set to “0”.
Definition
“1”
“0”
Ready
Busy
-
-
Terminated in error
Terminated normally
Terminated in error
Terminated normally
-
-
-
-
-
-
-
-
Status Register 1 (SRD1)
Status register 1 indicates the status of serial communications, re-
sults from ID checks and results from check sum comparisons. It can
be read after the SRD by writing the read status register command
(7016). Also, status register 1 is cleared by writing the clear status
register command (5016).
Table 19 gives the definition of each status register bit. “0016” is out-
put when power is turned on and the flag status is maintained even
after the reset.
Boot Update Completed Bit (SR15)
This flag indicates whether the control program was downloaded to
the RAM or not, using the download function.
Table 19 Status register 1 (SRD1)
SRD1 bits
SR15 (bit7)
SR14 (bit6)
SR13 (bit5)
SR12 (bit4)
SR11 (bit3)
SR10 (bit2)
Status name
Boot update completed bit
Reserved
Reserved
Checksum match bit
ID check completed bits
SR9 (bit1)
SR8 (bit0)
Data reception time out
Reserved
Check Sum Consistency Bit (SR12)
This flag indicates whether the check sum matches or not when a
program is downloaded for execution using the download function.
ID Check Completed Bits (SR11 and SR10)
These flags indicate the result of ID checks. Some commands can-
not be accepted without an ID check.
Data Reception Time Out (SR9)
This flag indicates when a time out error is generated during data
reception. If this flag is attached during data reception, the received
data is discarded and the microcomputer returns to the command
wait state.
Definition
“1”
“0”
Update completed
Not Update
-
-
-
-
Match
00
Mismatch
Not verified
01
Verification mismatch
10
Reserved
11
Verified
Time out
Normal operation
-
-
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