M37270MF Datasheet, PDF (52/94 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M37270MF-XXXSP
M37270EF-XXXSP, M37270EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
(4) Clock for OSD
As a clock for display to be used for OSD, it is possible to select one
of the following 3 types.
• ^{Data slicer clock output from the data slicer (approximately 26 MHz)}
• ^{Clock from the LC oscillator supplied from the pins OSC1 and OSC2}
• ^{Clock from the ceramic resonator or the quartz-crystal oscillator}
from the pins OSC1 and OSC2
This OSD clock for each block can be selected by the following bits
: bit 7 of the port P3 direction register, bits 5 and 4 of the clock source
control register (addresses 021616). A variety of character sizes can
be obtained by combining dot sizes with OSD clocks. When not us-
ing the pins OSC1 and OSC2 for the OSD clock I/O pins, the pins
can be used as sub-clock I/O pins or port P6.
Table 13. Setting for P63/OSC1/XCIN, P64/OSC2/XCOUT
Register
Function OSD clock Sub-clock
I/O pin
I/O pin
Input
port
b7 Port P3 direction
0
register
0
1
Clock source
b5 0 1 1
0
0
control register
b4 1 0 1
0
1
7
0
Clock source control register
(CS : address 021616)
CC mode clock selection bit
0 : Data slicer clock
1 : OSC1 clock
OSD mode clock selection bits
b2 b1
0 0 : Data slicer clock
0 1 : OSC1 clock
1 0:
1 1 : ^{Do not set}
EXOSD mode clock selection bit
0 : Data slicer clock
1 : OSC1 clock
OSD1 oscillating mode selection bits
b5 b4
0 0 : 32 kHZ oscillating mode
0 1 : Input ports P63, P64
1 0 : LC oscillating mode
1 1 : Ceramic • quartz-crystal
oscillating mode
Pre-divide ratio of layer 2 selection bit
0:!1
1:!2
Test bit (Note)
Note : Be sure to set bit 7 to “0” for program of the mask and the
EPROM versions. For the emulator MCU version
(M37270ERSS), be sure to set bit 7 to “1” when using the
data slicer clock for software debugging.
Fig. 59. Structure of clock control register
Data slicer
circuit
32 kHZ
“00”
Data slicer clock “0”
“1” ^CS0
“0”
LC
Ceramic •
quartz-crystal
OSC1 clock
“10”
CS5, CS4
“11”
“1”
CS1
CS2 = “0”
“0”
“1” ^CS3
CC mode block
OSD mode block
EXOSD mode block
Oscillating mode for OSD
Fig. 60. Block diagram of OSD selection circuit
52