M37270MF Datasheet, PDF (13/94 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M37270MF-XXXSP
M37270EF-XXXSP, M37270EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
(9)Timer 5 · 6 interrupt
An interrupt is generated by an overflow of timer 5 or 6. Their
priorities are same, and can be switched by software.
(10)BRK instruction interrupt
This software interrupt has the least significant priority. It does
not have a corresponding interrupt enable bit, and it is not af-
fected by the interrupt disable flag I (non-maskable).
Interrupt request bit
Interrupt enable bit
Interrupt disable flag I
BRK instruction
Reset
Interrupt
request
Fig. 6. Interrupt control
7
0
7
0
Interrupt request register 1
(IREQ1: address 00FC16)
0
Interrupt request register 2
(IREQ2: address 00FD16)
Timer 1 interrupt request bit
Timer 2 interrupt request bit
Timer 3 interrupt request bit
Timer 4 interrupt request bit
OSD interrupt request bit
VSYNC interrupt request bit
A-D conversion • INT3 interrupt
request bit
0 : No interrupt request issued
1 : Interrupt request issued
INT1 interrupt request bit
Data slicer interrupt request bit
Serial I/O interrupt request bit
f(XIN)/4096 interrupt request bit
INT2 interrupt request bit
Multi-master I²C-BUS
interface interrupt request bit
Timer 5 • 6 interrupt request bit
Fix this bit to “0.”
7
0
7
Interrupt control register 1
( ICON1: address 00FE16)
Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
Timer 3 interrupt enable bit
Timer 4 interrupt enable bit
OSD interrupt enable bit
VSYNC interrupt enable bit
A-D conversion • INT3 interrupt
request bit
0 : Interrupt disabled
1 : Interrupt enabled
Fig. 5. Structure of interrupt-related registers
0
Interrupt control register 2
( ICON2 : address 00FF16)
INT1 interrupt enable bit
Data slicer interrupt enable bit
Serial I/O interrupt enable bit
f(XIN)/4096 interrupt enable bit
INT2 interrupt enable bit
Multi-master I²C-BUS
interface enable bit
Timer 5 • 6 interrupt enable bit
Timer 5 • 6 interrupt switch bit
0 : Timer 5
1 : Timer 6
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