M37270MF Datasheet, PDF (49/94 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M37270MF-XXXSP
M37270EF-XXXSP, M37270EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
(2) Display Position
The display positions of characters are specified in units called a
“block.” There are 16 blocks, blocks 1 to 16. Up to 40 characters can
be displayed in each block (refer to (6) Memory for OSD).
The display position of each block can be set in both horizontal and
vertical directions by software.
The display position in the horizontal direction can be selected for all
blocks in common from 256-step display positions in units of 4 TOSC
(TOSC = oscillating cycle for OSD).
The display position in the vertical direction for each block can be
selected from 1024-step display positions in units of 1 TH ( TH = HSYNC
cycle).
Blocks are displayed in conformance with the following rules:
ΠWhen the display position is overlapped with another block
(Figure 53, (b)), a lower block number (1 to 16) is displayed on
the front.
 When another block display position appears while one block is
displayed (Figure 53 (c)), the block with a larger set value as the
vertical display start position is displayed. However, do not dis-
play block with the dot size of 2TC ! 2H or 3TC ! 3H during dis-
play period ( V ) of another block.
V In the case of OSD mode block: 20 dots in vertical from the verti-
cal display start position.
V In the case of CC or EXOSD mode block: 26 dots in vertical from
the vertical display start position.
(HR)
VP11, VP21
VP12, VP22
VP13, VP23
(a) Example when each block is separated
Block 1
Block 2
Block 3
(HR)
VP11, VP21
VP12, VP22
(b) Example when block 2 overlaps with block 1
Block 1
(Block 2 is not displayed)
(HR)
VP11, VP21
VP12, VP22
Block 1
Block 2
(c) Example when block 2 overlaps in process of block 1
Note: VP1i or VP2i (i : 1 to 16) indicates the contents of vertical position registers 1i or 2i.
Fig. 53. Display position
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