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M34512M2 Datasheet, PDF (46/80 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
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MITSUBISHI MICROCOMPUTERS
4512 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
LIST OF PRECAUTIONS
ŒNoise and latch-up prevention
Connect a capacitor on the following condition to prevent noise
and latch-up;
• connect a bypass capacitor (approx. 0.1 µF) between pins VDD
and VSS at the shortest distance,
• equalize its wiring in width and length, and
• use relatively thick wire.
 Prescaler
Stop the prescaler operation to change its frequency dividing ra-
tio.
’INT1 pin
When the interrupt valid waveform of INT1 pin is changed with
the bit 2 of register I2 in software, be careful about the following
notes.
• Clear the bit 1 of register V1 to “0” before the interrupt valid wave-
form of INT1 pin is changed with the bit 2 of register I2 (refer to
Figure 41Ž).
• Depending on the input state of the INT1 pin, the external 1 inter-
rupt request flag (EXF1) may be set when the interrupt valid
waveform is changed. Accordingly, clear bit 2 of register I2 and
execute the SNZ1 instruction to clear the EXF1 flag after execut-
ing at least one instruction (refer to Figure 41).
ŽTimer count source
Stop timer 1, 2, 3, or 4 counting to change its count source.
Reading the count value
Stop timer 1, 2, 3, or 4 counting and then execute the TAB1,
TAB2, TAB3, or TAB4 instruction to read its data.
Writing to reload registers R1 and R3
When writing data to reload registers R1 or R3 while timer 1 or
timer 3 is operating, avoid a timing when timer 1 or timer 3
underflows.
‘INT0 pin
When the interrupt valid waveform of the INT0 pin is changed
with the bit 2 of register I1 in software, be careful about the fol-
lowing notes.
• Clear the bit 0 of register V1 to “0” before the interrupt valid wave-
form of INT0 pin is changed with the bit 2 of register I1 (refer to
Figure 40Œ).
• Depending on the input state of the INT0 pin, the external 0 inter-
rupt request flag (EXF0) may be set when the interrupt valid
waveform is changed. Accordingly, clear bit 2 of register I1, and
execute the SNZ0 instruction to clear the EXF0 flag after execut-
ing at least one instruction (refer to Figure 40)
...
LA 8
TV1A
LA 8
TI2A
NOP
SNZ1
NOP
...
; (!!0!2)
; The SNZ1 instruction is valid ...........Ž
; Change of the interrupt valid waveform
........................................................... 
; The SNZ1 instruction is executed
! : this bit is not related to the setting of INT1.
Fig. 41 External 1 interrupt program example
“ Multifunction
The input of P20–P22 can be used even when SCK, SOUT, SIN are
selected.
...
LA 4
TV1A
LA 4
TI1A
NOP
SNZ0
NOP...
; (!!!02)
; The SNZ0 instruction is valid ...........Œ
;
; Interrupt valid waveform is changed
........................................................... 
; The SNZ0 instruction is executed
! : this bit is not related to the setting of INT0 pin.
Fig. 40 External 0 interrupt program example
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