SMJ44400 Datasheet, PDF (13/21 Pages) Austin Semiconductor – 1M x 4 DRAM DYNAMIC RANDOM-ACCESS MEMORY

DRAM
SMJ44400
ENHANCED-PAGE-MODE WRITE-CYCLE TIMING²
(1)
(1)
NOTES:
1. Referenced to CAS\ or W\, whichever occurs last.
2. A read cycle or a read-write cycle can be intermixed with write cycles as long as read and read-write timing specifications are not violated.
SMJ44400
Rev. 2.2 01/10
13
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