SDA9488X Datasheet, PDF (32/87 Pages) Micronas – Cost-effective Picture-In-Picture ICs

SDA 9488X
SDA 9588X
Preliminary Data Sheet
System Description
READD
CLPDEL
D2 D1 D0
0
000
0
111
0
000
0
111
1
000
1
111
1
000
1
111
CLPLEN
D1 D0
00
00
01
01
00
00
01
01
a (←s)
Blanking
Start
-1.5
-11
-1.5
-11.0
-0.8
-5.5
-0.8
-5.5
b (←s)
Blanking
Duration
10.5
10.5
7.9
7.9
5.3
5.3
4
4
c (←s)
Clamping
Start
3
-6.4
2.2
-7.3
1.5
-3.2
1.1
-3.6
d (←s)
Clamping
Duration
5
5
3.8
3.8
2.5
2.5
1.9
1.9
Table 4-18 PIP horizontal blanking timing
4.9.1
Contrast, Brightness and Peak Level Adjustment
The peak level adjustment modifies the magnitude of each channel separately. It should
be used to adapt once the signal levels to the following stage. The contrast adjustment
influences all three channels and allows a further increase of 30% of the peak level
magnitude. The effect of the brightness adjustment depends on the selected output
mode (RGB/YUV). In YUV mode it changes the offset of the OUT2 (Y) signal only while
in RGB mode it changes the offset of all three channels at the same time. The brightness
increase is up to 20%.
4.9.2
Pedestal Level Adjustment
The pedestal level adjustment controlled by I²C signals BLKLR, BLKLG, BLKLB
enables the correction of small offset errors, possibly appearing at the successive
blanking stage of RGB processor. This adjustment has an effect on the setup level
during the active line interval of each channel like the brightness adjustment but has an
enhanced resolution of 0.5 LSB. The maximum possible offset amounts to 7.5 LSBs. In
YUV mode (OUTFOR = ’1’) the action depends on the setting of BLKINVR and
BLKINVB. If BLKINVR (BLKINVB) is active the offset applies to the blank level of the
RV (BU) channel during the clamping interval for shifting the setup level to the negative
direction. In RGB mode (OUTFOR = ’0’) BLKINVR and BLKINVB have no effect.
Micronas
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