SDA9488X Datasheet, PDF (29/87 Pages) Micronas – Cost-effective Picture-In-Picture ICs

SDA 9488X
SDA 9588X
Preliminary Data Sheet
System Description
vertical
decimation
factor
1
...
6
displayed
lines (50Hz)
264
displayed
lines (50Hz)
with reduction
214
44
35
displayed
lines (60Hz)
216
36
displayed
lines (60Hz)
with reduction
175
29
Figure 4-12 Number of lines without and with reduction of vertical picture size
.
Figure 4-13 16:9 inset picture without and with reduction of vertical picture size
4.8.5
Parent Clock Generation
The phase of the output signals is locked to the rising edge of the horizontal sync pulse.
The frequency varies in a certain range to ensure correct aspect ratio for 16:9
applications depending on HZOOM. The horizontal and vertical scaling can be used for
all display frequencies.
display
format
4:3
4:3
16:9
16:9
inset
picture
format
4:3
4:3
4:3
16:9
desired
PiP format
4:3
16:9
4:3
16:9
required
parent
frequency
27
20.25
36
36
Table 4-17 Format conversion using HZOOM
Micronas
4-29
value of HZOOM
D2 D1 D0
0
0
0
0
0
1
0
1
0
0
1
0