SDA9488X Datasheet, PDF (10/87 Pages) Micronas – Cost-effective Picture-In-Picture ICs

SDA 9488X
SDA 9588X
4
System Description
Preliminary Data Sheet
System Description
4.1
Analog Frontend
4.1.1
Input Selection
An analog inset CVBS signal can be fed to the inputs CVBS1-3 of SDA 9588X resp. SDA
9488X. Each of these sources is selectable via I²C bus (CVBSEL). CVBS2 and CVBS3
can be used as separate Y/C inputs. YUV sources can be connected to CVBS1, CVBS2
and CVBS3 provided YUV operation at the SDA 9588X being enabled (YUVSEL). Using
an external switch the SDA 9588X can operate in applications with both YUV and CVBS
signals.
CVBSEL
D1 D0
00
01
10
11
XX
Table 4-1
YUVSEL
0
0
0
0
1
CVBS1
CVBS
Y (VBS)
Input selection
Input
CVBS2
CVBS
Y (VBS)
U (CB)
CVBS3
C
CVBS
V (CR)
remark
Y/C mode
YUV mode
(SDA 9588X only)
4.1.2
AD-Conversion
All signal are clamped and AD-converted with an amplitude resolution of 8bit. CVBS and
Y signals are clamped to the sync bottom whereas U/V and C signals are clamped to
their mid-level during blanking.
Inset
Video
HD
CLAMPI
CLMPIST
CLMPID
Figure 4-1 Clamping timing
Micronas
4-10