SDA9488X Datasheet, PDF (20/87 Pages) Micronas – Cost-effective Picture-In-Picture ICs

SDA 9488X
SDA 9588X
Preliminary Data Sheet
System Description
Display
Mode
1
DISPMOD
D1 D0
0
0
Size
SIZEHOR/
SIZEVER
HSRHNK/
VSHRNK
Picture
configuration
single PIP mode,
Pixel
216
-
60
Lines
625 525
88
72
-
-
24
20
2
0
1
3 X1/9 one upon another 216 264 216
(same content)
3
1
0
4 X 1/16 one upon another 156 264 216
(same content)
Table 4-9 Multi-display modes
The display modes are shown in the appendix. The sizes of the partial pictures are listed
in table 4-9.
4.7
Display Control
The on-chip memory capacity is 512 kbits. Provided that the same standard (50 or 60
Hz) video sources are applied to inset and parent channel, jointline-free frame mode
display is possible. This means that every incoming field is processed and displayed by
the SDA 9488X/SDA 9588X processor. The result is a high vertical and time resolution.
For this purpose the standard is analyzed internally and frame mode display is blocked
automatically, if the described restrictions are not fulfilled. Then only every second
incoming field is shown (field mode). Field mode normally shows jointlines. This is
caused by an update of the memory during read out. The result is that one part of the
picture contains new picture information and the other part contains one earlier written
field. The switching from or to frame mode is free of artifacts.
Activation of frame-mode display is blocked automatically if at least one of the following
conditions is not fulfilled:
• Inset and parent channel have the same field repetition frequency. This means that
frame mode is possible only for 50Hz inset and parent sources or 60Hz inset and
parent sources.
• Interlace signal is detected for inset and parent channel. For progressive scan or
(S)VGA display therefore only field mode is possible. For some VCRs in trick mode,
often no interlace is detected also.
• The number of lines is within a predefined range for inset (FMACTI) or parent
(FMACTP) channel (assuming standard signals according to ITU)
Micronas
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