DDP3300A Datasheet, PDF (10/53 Pages) Micronas – Single-Chip Display and Deflection Processor

DDP 3300 A
PRELIMINARY DATA SHEET
2.1.9. Chroma Transient Improvement
The intention of this block is to enhance the chroma
resolution. A correction signal is calculated by differenti-
ation of the color difference signals. The differentiation
can be selected according to the signal bandwidth, e.g.
for PAL/NTSC/SECAM or digital component signals,
respectively. The amplitude of the correction signal is
adjustable. Small noise amplitudes in the correction sig-
nal are suppressed by an adjustable coring circuit. To
eliminate ‘wrong colors’, which are caused by over and
undershoots at the chroma transition, the sharpened
chroma signals are limited to a proper value automati-
cally.
a)
Cr in
Cb in
t
b)
Ampl.
t
c)
Cr out
Cb out
t
a) Cr Cb input of DTI
b) Cr Cb input)Correction signal
c) sharpened and limited Cr Cb
Fig. 2–7:Digital Color Transient Improvement
10
2.1.10. Inverse Matrix
A 6-multiplier matrix transcodes the Cr and Cb signals
to R–Y, B–Y, and G–Y. The multipliers are also used to
adjust color saturation in the range of 0 to 2. The coeffi-
cients are signed and have a resolution of 9 bits. There
are separate matrix coefficients for main and side pic-
tures. The matrix computes:
R–Y+MR1*Cb)MR2*Cr
G–Y+MG1*Cb)MG2*Cr
B–Y+MB1*Cb)MB2*Cr
The initialization values for the matrix are computed
from the standard ITUR (CCIR) matrix:
ǒ Ǔ ^R
10
1.402 Y
G ₊ 1 * 0.345 * 0.713 Cb
B
1 1.773 0
Cr
For a contrast setting of CTM+32, the matrix values are
scaled by a factor of 64, see also table 3–1.
2.1.11. RGB Processing
After adding the post-processed luma, the digital RGB
signals are limited to 10 bits. Three multipliers are used
to digitally adjust the white drive. Using the same multi-
pliers an average beam current limiter is implemented.
See also section 2.2.1. ‘CRT Measurement and Con-
trol’.
2.1.12. OSD Color Lookup Table
The DDP 3300 A has five input lines for an OSD signal.
This signal forms a 5-bit address for a color look-up table
(CLUT). The CLUT is a memory with 32 words where
each word holds a RGB value.
Bits 0 to 3 (bit 4+0) form the addresses for the ROM part
of the OSD, which generates full RGB signals (bit 0 to 2)
and half-contrast RGB signals (bit 3).
Bit 4 addresses the RAM part of the OSD with 16 freely
programmable colors, addressable with bit 0 to 3. The
programming is done via the I²C-bus.
The amplitude of the CLUT output signals can be ad-
justed separately for R, G and B via the I²C-bus. The
switchover between video RGB and OSD RGB is done
via the Priority bus.
2.1.13. Picture Frame Generator
When the picture does not fill the total screen (height or
width too small) it is surrounded with black areas. These
areas (and more) can be colored with the picture frame
generator. This is done by switching over the RGB signal
from the matrix to the signal from the OSD color look-up
table.
MICRONAS INTERMETALL