EDY4016AABG-DR-F Datasheet, PDF (326/356 Pages) Micron Technology – Databus write cyclic redundancy check (CRC)

Electrical Characteristics and AC Timing Parameters
Table 147: Electrical Characteristics and AC Timing Parameters: DDR4-1600 through DDR4-2400
Parameter
Clock period average (DLL off mode)
Clock period average
High pulse width average
Low pulse width average
Clock period jitter
Total
Deterministic
DLL locking
Clock absolute period
Clock absolute high pulse width
(includes duty cycle jitter)
Clock absolute low pulse width
(includes duty cycle jitter)
Cycle-to-cycle jitter
Total
Deterministic
DLL locking
Symbol
t_{CK (DLL_OFF)}
t_{CK (AVG,}
DLL_ON)
t_{CH (AVG)}
t_{CL (AVG)}
t_{JITper_tot}
t_{JITper_dj}
t_JITper,lck
t_{CK (ABS)}
t_{CH (ABS)}
t_{CL (ABS)}
t_{JITcc _tot}
t_{JITcc _dj}
t_JITcc,lck
DDR4-1600 DDR4-1866
Min Max Min Max
Clock Timing
8
20
8
20
1.25 1.6 1.071 1.6
DDR4-2133
Min Max
8
20
0.937 1.6
DDR4-2400
Min Max
8
20
0.833 1.6
0.48 0.52 0.48 0.52 0.48 0.52 0.48 0.52
0.48 0.52 0.48 0.52 0.48 0.52 0.48 0.52
–63
63
–54
54
–47
47
–42
42
–31
31
–27
27
–23
23
–21
21
–50
50
–43
43
–38
38
-33
33
MIN = ^tCK (AVG) MIN + ^tJITper_tot MIN; MAX = ^tCK (AVG) MAX +
t_{JITper_tot MAX}
0.45
–
0.45
–
0.45
–
0.45
–
0.45
–
0.45
–
0.45
–
0.45
–
125
107
94
83
63
54
47
42
100
86
75
67
Unit Notes
ns
ns
14
CK
CK
ps
ps
ps
ps
t_CK
(AVG)
t_CK
(AVG)
ps
ps
ps