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EDY4016AABG-DR-F Datasheet, PDF (291/356 Pages) Micron Technology – Databus write cyclic redundancy check (CRC)
4Gb: x16 DDR4 SDRAM
Electrical Characteristics – On-Die Termination Characteristics
Table 121: ODT Voltage and Temperature Sensitivity
Parameter
dRTTdT
dRTTdV
Min
0
0
Max
1.5
0.15
Unit
%/°C
%/mV
ODT Timing Definitions
The reference load for ODT timings is different than the reference load used for timing
measurements.
Figure 226: ODT Timing Reference Load
CK_t, CK_c
VDDQ
DUT
DQ, DQS_t, DQS_c,
DM, TDQS_t, TDQS_c
RTT = 50ȍ
VSSQ
Timing reference point
VTT = VSSQ
ODT Timing Definitions and Waveforms
Definitions for tADC, tAONAS, and tAOFAS are provided in the Table 122 (page 291) and
shown in Figure 227 (page 292) and Figure 229 (page 293). Measurement reference set-
tings are provided in the subsequent Table 123 (page 292).
The tADC for the dynamic ODT case and read disable ODT cases are represented by
tADC of Direct ODT Control case.
Table 122: ODT Timing Definitions
Parameter
Begin Point Definition
tADC
Rising edge of CK_t, CK_c defined by the end point of
DODTLoff
Rising edge of CK_t, CK_c defined by the end point of
DODTLon
Rising edge of CK_t, CK_c defined by the end point of
ODTLcnw
Rising edge of CK_t, CK_c defined by the end point of
ODTLcwn4 or ODTLcwn8
tAONAS
Rising edge of CK_t, CK_c with ODT being first registered
HIGH
tAOFAS
Rising edge of CK_t, CK_c with ODT being first registered
LOW
End Point Definition
Extrapolated point at VRTT,nom
Extrapolated point at VSSQ
Extrapolated point at VRTT,nom
Extrapolated point at VSSQ
Extrapolated point at VSSQ
Extrapolated point at VRTT,nom
Figure
Figure 227
(page 292)
Figure 227
(page 292)
Figure 228
(page 293)
Figure 228
(page 293)
Figure 229
(page 293)
Figure 229
(page 293)
PDF: 09005aef85f537bf
4gb_ddr4_dram_2e0d.pdf - Rev. C 10/15 EN
291
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