MT49H32M9 Datasheet, PDF (23/76 Pages) Micron Technology – 288Mb: x9, x18, x36 2.5V VEXT, 1.8V VDD, HSTL, CIO, RLDRAM II

288Mb: x9, x18, x36 2.5V VEXT, 1.8V VDD, HSTL, CIO, RLDRAM II
Electrical Specifications – AC and DC
Input Slew Rate Derating
Table 10 on page 22 and Table 11 on page 23 define the address, command, and data
setup and hold derating values. These values are added to the default ^tAS/^tCS/^tDS and
t_AH/t_CH/t_{DH specifications when the slew rate of any of these input signals is less than}
the 2 V/ns the nominal setup and hold specifications are based upon.
To determine the setup and hold time needed for a given slew rate, add the ^tAS/^tCS
default specification to the “^tAS/^tCS VREF to CK/CK# Crossing” and the ^tAH/^tCH default
specification to the "^tAH/^tCH CK/CK# Crossing to VREF" derated values on Table 10. The
derated data setup and hold values can be determined in a like manner using the “^tDS
VREF to CK/CK# Crossing” and “^tDH to CK/CK# Crossing to VREF” values on Table 11. The
derating values on Table 10 and Table 11 apply to all speed grades.
The setup times on Table 10 and Table 11 represent a rising signal. In this case, the time
from which the rising signal crosses VIH(AC) MIN to the CK/CK# cross point is static and
must be maintained across all slew rates. The derated setup timing represents the point
at which the rising signal crosses VREF(DC) to the CK/CK# cross point. This derated value
is calculated by determining the time needed to maintain the given slew rate and the
delta between VIH(AC) MIN and the CK/CK# cross point. The setup values in Table 10
and Table 11 are also valid for falling signals (with respect to VIL[AC] MAX and the CK/
CK# cross point).
Note:
The hold times in Table 10 and Table 11 represent falling signals. In this case, the time
from the CK/CK# cross point to when the signal crosses VIH(DC) MIN is static and must
be maintained across all slew rates. The derated hold timing represents the delta
between the CK/CK# cross point to when the falling signal crosses VREF(DC). This
derated value is calculated by determining the time needed to maintain the given slew
rate and the delta between the CK/CK# cross point and VIH(DC). The hold values in
Table 10 and Table 11 are also valid for rising signals (with respect to VIL[DC] MAX and
the CK and CK# cross point).
The above descriptions also pertain to data setup and hold derating when CK/CK# are
replaced with DK/DK#.
PDF: 09005aef80a41b46/Source: 09005aef809f284b
288Mb_RLDRAM_II_CIO_D2.fm - Rev M 9/07 EN
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