RV-8523 Datasheet, PDF (40/57 Pages) MICORO CRYSTAL SWITZERLAND – Real Time Clock

Micro Crystal
Real Time Clock / Calendar Module
RV-8523
For timer B, interrupt pulse width is programmable via bit TBM (register Timer & CLKOUT).
Interrupt low pulse width for timer B (pulse mode, bit TBM set logic 1):
Source clock (Hz)
Interrupt pulse width
n = 1¹⁾
4096
122 µs
64
7.812 ms
1
1_/60
1_/3600
See section 8.6.4.
:
:
n > 1¹⁾
244 µs
See section 8.6.4.²⁾
:
:
:
1) _{n = loaded timer register value. Timer stops when n = 0.}
2) _{If pulse period is shorter than the setting via bit TBW[2:0], the interrupt pulse width is set to 15.625 ms.}
When flags like SF, CTAF, WTAF and CTBF are cleared before the end of the interrupt pulse, then the interrupt
pulse is shortened. This allows the source of a system interrupt to be cleared immediately when it is serviced, that
is, the system does not have to wait for the completion of the pulse before continuing; see figures below.
Instructions for clearing flags can be found in section 9.5. Instructions for clearing the bit WTAF can be found in
section 9.9.1.
Example of shortening the INT_1 pulse by clearing the SF flag:
The timing shown for clearing bit SF is also valid for the non-pulsed interrupt mode, that is, when TAM set logic
0, where the INT_1 pulse may be shortened by setting SIE logic 0.
1) _{Indicates normal duration of INT_1 pulse.}
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