RV-8523 Datasheet, PDF (30/57 Pages) MICORO CRYSTAL SWITZERLAND – Real Time Clock

Micro Crystal
Real Time Clock / Calendar Module
RV-8523
To prevent the timer flags being overwritten while clearing bit AF, logic AND is performed during a write access. A
flag is cleared by writing logic 0 while a flag is not cleared by writing logic 1. Writing logic 1 results in the flag value
remaining unchanged.
Flag location in register Control 2:
Address
Function
01h
Control 2
Bit 7
WTAF
Bit 6
CTAF
Bit 5
CTBF
Bit 4
SF
Bit 3
AF
Bit 2
-
Bit 1
-
Bit 0
-
The table below shows what instruction must be sent to clear bit AF. In this example, bit CTAF, CTBF and bit SF
are unaffected.
Example to clear only AF (bit 3):
Address
Function
01h
Control 2
Bit 7
0
Bit 6
1
Bit 5
1
Bit 4
1
Bit 3
0
Bit 2
-
Bit 1
-
Bit 0
-
Note:
The bits labeled as “-“ have to be re-written with the previous values.
9.6. ALARM INTERRUPTS
Generation of interrupts from the alarm function is controlled via the bit AIE (register Control 1). If AIE is enabled,
the INT_1 follows the status of bit AF (register Control 2). Clearing AF immediately clears INT_1. No pulse
generation is possible for alarm interrupts.
Example where only the minute alarm is used and no other interrupts are enabled:
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