RV-8523 Datasheet, PDF (37/57 Pages) MICORO CRYSTAL SWITZERLAND – Real Time Clock

Micro Crystal
Real Time Clock / Calendar Module
RV-8523
First period delay for timer counter value n:
Timer source clock
Minimum timer-period
4.096 kHz
n
64 Hz
1 Hz
1_{/60 Hz}
1_{/3600 Hz}
n
(n - 1) + ¹/64 Hz
(n - 1) + ¹/64 Hz
(n - 1) + ¹/64 Hz
Maximum timer-period
n+1
n+1
n + ¹/64 Hz
n + ¹/64 Hz
n + ¹/64 Hz
The generation of interrupts from the countdown timer is controlled via the CTAIE bit (register Control 2).
When the interrupt generation is enabled (CTAIE = 1) and the countdown timer flag CTAF is set logic 1, an
interrupt signal on INT_1 is generated. The interrupt may be generated as a pulsed signal every countdown period
or as a permanently active signal, which follows the condition of CTAF (register Control 2). The TAM bit (register
Timer & CLKOUT) is used to control this mode selection. The interrupt output may be disabled with the CTAIE bit
(register Control 2).
9.9.2.TIMER B
Timer B can only be used as a countdown timer and can be switched on and off by the TBC bit in register Timer &
CLKOUT (0Fh).
The generation of interrupts from the countdown timer is controlled via the CTBIE bit (register Control 2).
When enabled, it counts down from the software programmed 8 bit binary value n in register Timer B (13h). When
the counter reaches 1, on the next rising edge of the timer clock, the following events occur (see figure below):
• The countdown timer flag CTBF (register Control 2) is set logic 1
• When the interrupt generation is enabled (CTBIE = 1), interrupt signals on INT_1 and INT_2 are
generated
• The counter automatically reloads
• The next timer-period starts
General countdown timer behavior:
In this example, it is assumed that the countdown timer flag (CTAF) is cleared before the next countdown period
expires and that the interrupt output is set to pulse mode.
37/57