PIC16F87_05 Datasheet, PDF(92/228 Page) Microchip Technology – 18/20/28-Pin Enhanced Flash Microcontrollers with nanoWatt Technology

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PIC16F87_05 Datasheet, PDF (92/228 Pages) Microchip Technology – 18/20/28-Pin Enhanced Flash Microcontrollers with nanoWatt Technology

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PIC16F87/88

FIGURE 10-1:

SSP BLOCK DIAGRAM

(SPIâ¢ MODE)

Read

Internal

Data Bus

Write

SSPBUF reg

RB1/SDI/SDA

RB2/SDO/RX/DT

SSPSR reg

bit0

Shift

Clock

RB5/SS/

TX/CK

RB4/SCK/

SCL

SS Control

Enable

Edge

Select

2

Clock Select

SSPM3:SSPM0

4

Edge

Select

TRISB<4>

TMR2 Output

2

Prescaler TCY

4, 16, 64

To enable the serial port, SSP Enable bit, SSPEN

(SSPCON<5>), must be set. To reset or reconfigure

SPI mode, clear bit SSPEN, reinitialize the SSPCON

register and then set bit SSPEN. This configures the

SDI, SDO, SCK and SS pins as serial port pins. For the

pins to behave as the serial port function, they must

have their data direction bits (in the TRISB register)

appropriately programmed. That is:

â¢ SDI must have TRISB<1> set

â¢ SDO must have TRISB<2> cleared

â¢ SCK (Master mode) must have TRISB<4>

cleared

â¢ SCK (Slave mode) must have TRISB<4> set

â¢ SS must have TRISB<5> set

Note 1: When the SPI is in Slave mode with SS pin

control enabled (SSPCON<3:0> = 0100),

the SPI module will reset if the SS pin is

set to VDD.

2: If the SPI is used in Slave mode with

CKE = 1, then the SS pin control must be

enabled.

TABLE 10-1: REGISTERS ASSOCIATED WITH SPIâ¢ OPERATION

Address

Name

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1

Bit 0

Value on

POR, BOR

Value on

all other

Resets

0Bh,8Bh INTCON

10Bh,18Bh

0Ch

PIR1

8Ch

PIE1

GIE PEIE TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u

â ADIF(1) RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF -000 0000 -000 0000

â ADIE(1) RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE -000 0000 -000 0000

86h

TRISB

PORTB Data Direction Register

1111 1111 1111 1111

13h

SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register

xxxx xxxx uuuu uuuu

14h

SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000

94h

SSPSTAT SMP CKE D/A

P

S

R/W

UA

BF 0000 0000 0000 0000

Legend: x = unknown, u = unchanged, - = unimplemented, read as â0â. Shaded cells are not used by the SSP in SPIâ¢ mode.

Note 1: This bit is only implemented on the PIC16F88. The bit will read â0â on the PIC16F87.

DS30487C-page 90

ï£© 2005 Microchip Technology Inc.

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