PIC16F87_05 Datasheet, PDF (108/228 Pages) Microchip Technology – 18/20/28-Pin Enhanced Flash Microcontrollers with nanoWatt Technology

PIC16F87/88
11.2.3
SETTING UP 9-BIT MODE WITH
ADDRESS DETECT
When setting up an asynchronous reception with
address detect enabled:
• Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit BRGH.
• Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
• If interrupts are desired, then set enable bit RCIE.
• Set bit RX9 to enable 9-bit reception.
• Set ADDEN to enable address detect.
• Enable the reception by setting enable bit CREN.
• Flag bit RCIF will be set when reception is
complete and an interrupt will be generated if
enable bit RCIE was set.
• Read the RCSTA register to get the ninth bit and
determine if any error occurred during reception.
• Read the 8-bit received data by reading the
RCREG register to determine if the device is
being addressed.
• If any error occurred, clear the error by clearing
enable bit CREN.
• If the device has been addressed, clear the
ADDEN bit to allow data bytes and address bytes
to be read into the receive buffer and interrupt the
CPU.
FIGURE 11-6:
AUSART RECEIVE BLOCK DIAGRAM
FOSC
x64 Baud Rate CLK
SPBRG
Baud Rate Generator
CREN
÷ 64
or
÷ 16
OERR
FERR
MSb
RSR Register
Stop (8) 7 • • • 1
LSb
0 _Start
RB2/SDO/RX/DT
Pin Buffer
and Control
Data
Recovery
RX9
8
SPEN
RX9
ADDEN
RX9
ADDEN
RSR<8>
Enable
Load of
Receive
Buffer
8
RX9D
RCREG Register
FIFO
Interrupt
RCIF
RCIE
8
Data Bus
DS30487C-page 106
 2005 Microchip Technology Inc.